AN2847

Start-up sequence

Doc ID 15136 Rev 2

9/31

Note:

BDU only guarantees that OUTX(Y, Z)_L and OUTX(X,Z)_H have been sampled at the

same moment. If the reading speed is too low, it is possible, for example, to read X and Y

sampled at T1 and Z sampled at T2.

2.2

Output data rate selection and reading timing

The output data rate is user selectable through the DRx bits of the CTRL_REG1 (20h)

register. At power-on-reset, the DRx are reset to 0, thus providing a default output data rate

of 50 Hz.

The analog signal coming from the mechanical sensor is filtered by a low pass filter before

being converted by the internal ADC. The frequency at -3 dB of the low pass filter

determines the effective system resolution. The cut-off frequency depends on the DR<1:0>

bits in the CTRL_REG1 (20h) register (

Table 2).

Note:

The output data rate precision is related to the internal oscillator; an error of +/- 10% should

be taken into account.

A typical reading period is defined which is 616 µs shorter than the output data rate period,

in order to prevent the loss of any data produced. During this time period the reading of the

data must be performed and the DataReady signal can be used as a trigger to begin the

reading sequence. At the end of the complete sequence, the DataReady signal goes down

and the rising edge that follows signals that new data are available. If this minimum reading

frequency is not observed, some data loss is possible and the DataReady signal is no

longer considered a trigger signal. The status register can be used to infer the occurrence of

an overrun.

Figure 1.

Reading timing

Table 2.

Output data rate

DR1, DR0

Output data rate

Analog filter

cut-off frequency (-3 dB)

00

50 Hz

37 Hz

01

100 Hz

74 Hz

10

400 Hz

292 Hz

11

1000 Hz

780 Hz

Table 3.

Timing value to prevent data loss

Time

Description

Typ

T0

Data rate

1/ODR