AN3303

Sensing optimization by waveform check

Doc ID 18164 Rev 2

15/27

performed by adding a capacitor on each DVS pin, as indicated before in Section 1.2. In

Figure 15 and 16, IC behavior corresponding to different values of RC sensing circuit is

shown.

It is important to point out that this fine tuning must be done at the maximum operating

corresponding turn-off forward. An over-delayed turn-off must be avoided because, if the

MOSFET is turned off after the drain current goes to zero, the resulting current reversal

produces a series of possible adverse effects, ranging from an efficiency drop to the

converter's catastrophic failure. A good rule of thumb is to keep at least a 50/100 nS margin

before the zero current point, because it has negligible impact on efficiency and it is a safe

margin in the case of abrupt load changes or other disturbances.

Figure 17 shows the case of operation above resonance. Note how the current flowing

through the MOSFET exhibits a very steep edge while decreasing down to zero. In this

case, no external capacitors are implemented because a further delay could cause a current

reversal.

Figure 17.

Operation above resonance frequency

Figure 15.

SR MOSFET turn-off

Figure 16.

SR MOSFET turn-off - detail

CH3: SR FET current

CH2: SR FET gate

CH4: primary current

CH3: SR FET current

CH2: SR FET gate

CH4: primary current

CH3: SR FET current

CH2: SR FET gate

CH4: primary current