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AN1506 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN1506 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 14 page ![]() AN1506 - APPLICATION NOTE 8/14 At a constant switching frequency fs, the turn on, turn off and conduction power losses in a device of an inverter leg (upper or lover device), working with sinusoidal shaped waveform of the current, are expressed respectively by: where j is the variable accounting for the number of switching cycles per second, which in turn by definition means the switching frequency fs. With reference to the used PWM technique, the current through the devices is sinusoidal-shaped, while the voltage across the device is the dc rail voltage maintained at constant amplitude. The use of relations (5-7), which is very simple in the case of a chopper circuit operated at constant load current [3-7], is more complicated in this case. This is due to two main reasons: the non-linearity of both the instantaneous voltage VDS and the instantaneous current iD during the switching transient, and the sinusoidal variation of the load current. From inspection of the data reported in figure 4 we can observe the nonlinear trend of the switching losses as function of the amplitude of the drain current at a constant clamp voltage. Thus, obtaining any closed equation from relations (5-6) is practically prevented. Equation (7) can be evaluated straightforward by a simple formula according to the following consideration. With reference to the used PWM technique, the current through the devices is sinusoidal- shaped (figure 9), while the voltage across the devices is the constant dc rail. Due to the use of the body- drain diodes as antiparallel devices, while for example an upper device of the inverter leg is in turn off condition a positive current will flow through the body diode of the lower device [8-9]. This happens surely during the dead time of the inverter, but the current can switch in the channel of the lower MOSFET once its gate is positive biased. The same behavior applies for the lower device in blocking state and the upper device conducting firstly through the diode and then through the channel. Hence, that means from an effective point of view that the conduction losses of a switch during a fundamental period T1 of the carrier are due to half sinusoidal waveform of the current. In fact, the current flows E on j ⋅ V DS j ⋅ iDj ⋅ t d 0 t on j ⋅ ∫ =2 () E off j ⋅ V DS j ⋅ iDj ⋅ t d 0 t off j ⋅ ∫ =3 () E con j ⋅ V DS j ⋅ iDj ⋅ tRoni 2 Dj ⋅ t d 0 tcon j ⋅ ∫ = d 0 tcon j ⋅ ∫ =4 () P on 1 2 --- jV DS j ⋅ iDj ⋅ t d 0 ton j ⋅ ∫ 1 fs ∑ =5 () P off 1 2 --- jV DS j ⋅ iDj ⋅ t d 0 toff j ⋅ ∫ 1 fs ∑ =6 () P con 1 2 --- jR oni 2 Dj ⋅ t d 0 t con j ⋅ ∫ 1 f s ∑ =7 () |
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