AN2689 datasheet(34/42 Pages) STMICROELECTRONICS

34 / 42 page

PCB layout recommendations

AN2689

34/42

Doc ID 14310 Rev 3

Figure 47.

Parasitic elements due to the wiring

Figure 47 shows there are two major parasitic elements:

●

Some parasitic inductance each side of the Transil

●

Some parasitic capacitance between lines

There is also some parasitic inductance brought by the lines themselves. These parasitic

elements cause inductive and capacitive coupling.

These parasitic couplings may induce over voltages or electromagnetic noise on adjacent

lines which have nothing to do with the protected lines.

The parasitic inductance is directly due to the PCB routing. The wiring tracks to the

protection device may drastically affect the efficiency of the protection device.

Consider a 35 µm copper track, 0.3 mm wide (W), spaced at 0.5 mm (h) from a ground

plane (see Figure 48). This gives the ratio h/W of 1.7. Figure 49 (AEMC source) shows, for

an h/W ratio of 1.7, a parasitic inductance of 5 nH/cm.

Figure 48.

Double sided PCB structure - single track

Figure 49.

Inductance variation versus PCB thickness for single copper track

(AEMC source)

Module to protect

Vnom

Vmax

Transil

V=V1+Vcl+V2

Vcl

Parasitic elements

εr=4.5

L (µH/m) versus h/W

0.1

h/w

AN2689 Datasheet(PDF) 34 Page - STMicroelectronics