AN4209 datasheet(16/19 Pages) STMICROELECTRONICS

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Design example

AN4209

16/19

DocID023949 Rev 2

3.3

Dissipated power calculation

Let’s verify that Tjpeak < 125 °C, and VCLtyp(500 mA; Tjavg) < VPmax.

3.3.1

Power losses calculation:

The curve is fitted in operating region to find RD, VCL0 (see Figure 11):

From Equation 4, RD equals:

From Equation 5, VCL0 is calculated as:

The dissipated power during the clamping time is now calculated:

The average power dissipation PD is calculated:

3.3.2

Peak and average junction temperature calculation:

Considering the low

T

j, due to the low value of tsw, before the thermal cst time thermal of

the device (see Section 1.2.2), the peak and average junction temperature are considered

identical:

From Equation 5, Tjpeak equals:

VCLtyp(IPPmax; 112°C) < VCLtyp(IPPmax; 125°C) < VPmax, STRVS185X02B is selected.

The power switch and STRVS should be both safe.

3.4

In-situ verification

The designer verifies all criteria with the final protection device.

Due to neighboring components sharing the same PCB layout in the system, Tjpeak can be

estimated more accurately with thermal measurement done from the lead. Table 5 presents

measurements results obtained with STRVS.

°5

)

125

;

600

;

400

(

178

)

125

;

600

;

400

(

Step

PPmax

Step

)

(

)

(

)

(

∫

step

peak

amb

112

max

)

(

Table 5. Sample measurements

IPPpeak

600 mA

65 ns

116 °C

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