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INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY

Initially, the silicon chip forms part of a very thin (usually 650 microns), round silicon slice: the

raw wafer. Wafer diameters are typically 125, 150 or 200 mm (5, 6 or 8 inches). However raw

pure silicon has a main electrical property: it is an isolating material. So some of the features

of silicon have to be altered, by means of well controlled processes. This is obtained by

"doping" the silicon.

Dopants (or doping atoms) are purposely inserted in the silicon lattice, hence changing the

features of the material in predefined areas: they are divided into “N” and “P” categories rep-

resenting the negative and positive carriers they hold. Many different dopants are used to

achieve these desired features: Phosphorous, Arsenic (N type) and Boron (P type) are the

most frequently used ones. Semiconductors manufacturers purchase wafers predoped with N

or P impurities to an impurity level of.1 ppm (one doping atom per ten million atoms of silicon).

There are two ways to dope the silicon. The first one is to insert the wafer into a furnace.

Doping gases are then introduced which impregnate the silicon surface. This is one part of the

manufacturing process called diffusion (the other part being the oxide growth). The second

way to dope the silicon is called ionic implantation. In this case, doping atoms are introduced

inside the silicon using an electron beam. Unlike diffusion, ionic implantation allows to put

atoms at a given depth inside the silicon and basically allows a better control of all the main

parameters during the process. Ionic implantation process is simpler than diffusion process

but more costly (ionic implanters are very expensive machines).

Passivation

Wafers are sealed with a passivation layer to prevent the device from contamina-

tion or moisture attack. This layer is usually made of silicon nitride or a silicon oxide

composite.

Back-lap

It’s the last step of wafer fabrication. Wafer thickness is reduced (for microcontroller

chips, thickness is reduced from 650 to 380 microns), and sometimes a thin gold

layer is deposited on the back of the wafer.