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AN1353 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN1353 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 17 page ![]() Gate current pulses AN1353 6/17 Rev 2 4 Gate current pulses 4.1 General description The gate current pulses are generated during the main program (refer to Appendix A and also to Figure 2). The Port A pins are set or reset depending on the information defined by the sub-routines described in para-graph 5. Annex 1 gives the flowchart of the main program. The ZVC events are sensed thanks to bit 0 of the FLAG register, which is only set during the NMI interrupt. The end of timer decrementations are also sensed by bit 1 of the FLAG register, which is set during timer interrupt. First, as soon as the ZVC is detected, the T1 decrementation is launched and the light bulb is switched on, if requested, by pulling PA3 down to VSS. After the timer interrupt, PA2 and PA3 are set, or not, depending on the process status. After T2 decrementation, PA3 is set and a new decrementation is launched (T3) to wait to turn off both Tr and Ts. After this pulse generation, the timer counts down T4 to synchronize the current measure to the moment at which it reaches its peak value. After the “Current_Measure” sub-routine, T5 is decremented in order to reach the beginning of the next half cycle. Gate current pulses are then generated as in the previous cycle. 4.2 How to change the pulse duration? All the pulse durations are based on a one half-cycle time reference basis. Indeed, in order to count the pe-riod time, the timer is launched after the last current pulse, when VLN is positive. DELTAT will then always represent a time shorter than 10 ms. To be sure that the timer overflow will never occur before the next NMI interrupt, we must ensure that the time to decrement 256 will be always higher than 10 ms. This condition can be reached with a 32 prescalar ratio. With such a value, even with the maximum allowed MCU clock frequency, the overflow will happen in 12.28 ms. T50Hz = DELTAT + T1 +T2 +T3, then represents the value to load in the TSCR register to achieve a 10 ms overflow period. To define an “n” ms duration, consider the following relation: So, Tx must be loaded in the TSCR to have a timer interrupt after “n” ms. However, as a division by ten is not easy to implement, and in order to increase the register accuracy, it is better to use variables in the range of 256. The variable “Dx” is used and defined as explained below: 10 ms T50Hz → n(ms) Tx → ⎫ ⎬ ⎭ Tx = T50Hz x n(ms) 10 Dx = n x 256 10 |
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