Rev.3.00, Jul.13.2005, page 1 of 7

HD74LS138

3-Line-to-8-Line Decoders / Demultiplexers

REJ03D0434–0300

Rev.3.00

Jul.13.2005

The HD74LS138 decodes one-of-eight line dependent on the conditions at the three binaly select inputs and the three

enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when

expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one

inverter. An enable input can be used as a data input for demultiplexing applications.

Features

• Ordering Information

Part Name

Package Type

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LS138P

DILP-16 pin

PRDP0016AE-B

(DP-16FV)

P

-

HD74LS138FPEL

SOP-16 pin (JEITA)

PRSP0016DH-B

(FP-16DAV)

FP

EL (2,000 pcs/reel)

HD74LS138RPEL

SOP-16 pin (JEDEC)

PRSP0016DG-A

(FP-16DNV)

RP

EL (2,500 pcs/reel)

Note:

Please consult the sales office for the above package availability.

Pin Arrangement

(Top view)

GND

15

16

1

2

3

4

5

6

7

14

8

9

10

11

12

13

A

B

C

A

B

C

Outputs

Select

Inputs

Outputs

Enable

Inputs