AN2692

Introduction to ST10F269Zx 0.35 µm embedded Flash memory

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1.2.3

Same Flash memory Status Register

The Flash memory Status Register is used to flag the status of the Flash memory and the

result of an operation.

To maximize the reuse of Flash memory programming software, the Flash memory Status

Register of standalone Flash memories has been kept.

This register can be accessed by read cycles during Program/Erase Controller (P/E.C.)

operations. Erase/program operations can be controlled by data polling on the FSB7 bit of

the Status Register. Toggle detection is indicated on FSB6 and FSB2, error on FSB5 and

erase timeout on the FSB3 bit. Any read attempt from the Flash memory during an erase or

a program operation will automatically output these five bits. The P/E.C. sets bits FSB2,

FSB3, FSB5, FSB6 and FSB7. Other bits are reserved for future use and should be

masked.

Flash memory Status

Note:

The address of the Flash memory Status Register is the address of the word being

programmed when a programming operation is in progress, or an address within the block

being erased when an erasing operation is in progress.

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

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FSB.7

FSB.6

FSB.5

-

FSB.3

FSB.2

-

-

RRR

R

R

FSB.7 bit Flash Status Bit 7: Data Polling bit

Programming operation: this bit outputs the complement of the bit 7 of the word being programmed,

and after completion, will output the bit 7 of the programmed word.

Erasing operation: outputs a ‘0’ during erasing, and ‘1’ after erasing completion.

If the block(s) selected for erasure is (are) protected, FSB.7 is set to ‘0’ for about 100 µs, and then

returns to the previous addressed memory data value.

FSB.7 also flags the Erase Suspend mode by switching from ‘0’ to ‘1’ at the start of Erase Suspend.

During program operation in Erase Suspend mode, FSB.7 has the same behavior as in normal

program execution outside the Erase Suspend mode.

FSB.6 bit Flash Status Bit 6: Toggle bit

Programming or erasing operations: successive read operations of Flash Status register deliver

complementary values. FSB.6 toggles each time the Flash Status Register is read. The program

operation is completed when two successive reads yield the same value. The next read will output

the last programmed bit, or a ‘1’ after an erase operation

FSB.6 is set to‘1’ if a read operation is attempted on an Erase Suspended block. In addition, an

Erase Suspend/Resume command will cause FSB.6 to toggle.

FSB.5 bit Flash Status Bit 5: Error bit

This bit is set to ‘1’ when there is a failure of a program, Block or Chip Erase operation.This bit is

also set if a user tries to program a bit to ‘1’ to a Flash memory location that is currently

programmed with ‘0’.

The error bit is reset after a Read/Reset command.

In case of success, the Error bit is set to ‘0’ during Program or Erase and then outputs the last

programmed bit or a ‘1’ after erasing

FSB.3 bit Flash Status Bit 3: Erase Timeout bit

This bit is set to ‘1’ by the P/E.C. when the last Block Erase command has been entered to the

Command Interface and is awaiting the erase start. When the timeout period is finished, after

96 µs, FSB.3 returns to ‘1’.