AN2752 datasheet(13/40 Pages) STMICROELECTRONICS

13 / 40 page

AN2752

Clock management

Doc ID 14651 Rev 5

13/40

Figure 6.

Clock sources

The values of the load capacitors CL1 and CL2 are heavily dependent on the crystal type and

frequency. The user can refer to the datasheet of the crystal manufacturer to select the

capacitances. For best oscillation stability CL1 and CL2 normally have the same value.

Typical values are in the range from below 20 pF up to 40 pF (cload: 10 … 20 pF). The

parasitic capacitance of the board layout also needs to be considered and typically adds a

few pF to the component values.

Recommendations

In the PCB layout all connections should be as short as possible. Any additional signals,

especially those that could interfere with the oscillator, should be locally separated from the

PCB area around the oscillation circuit using suitable shielding.

Hardware configuration

Frequency: 32 kHz … 24 MHz

Comparator hysteresis: 0.1 * VDD

Caution: Without prescaler, a duty cycle of maximum 45/55% must be respected

Frequency range: 1-24 MHz

Wake-up time: < 2 ms @ 24 MHz

Oscillation mode: Preferred fundamental

Output duty cycle: Max 55/45%

I/O’s: Standard I/O pins multiplexed with OSCIN and OSCOUT

Cload: 10 … 20 pF

Maximum crystal power: 100 µW

OSCIN

OSCOUT

External source

STM8

(I/O available)

Load capacitors

STM8

CL2

CL1

OSCIN

OSCOUT

AN2752 Datasheet(PDF) 13 Page - STMicroelectronics