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AN4062 Datasheet(PDF) 5 Page - STMicroelectronics |
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AN4062 Datasheet(HTML) 5 Page - STMicroelectronics |
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5 / 17 page ![]() DocID022897 Rev 3 5/17 AN4062 Peripheral firmware examples description 3 Peripheral firmware examples description 3.1 GPIO toggle example Purpose This example describes how to use BSRR and BRR (Port Bit Set/Reset Register High and Low) for maximum I/O toggling. GPIO ports are connected on the AHB bus; using BSRR and BRR registers, two cycles are required to set a pin and another two cycles to reset it. So GPIO pins can toggle at AHB clock divided by 4. Description In this example, PC8 and PC9 (configured in push-pull output mode) toggle in a forever loop: • Set PC8 and PC9 by setting corresponding bits in BSRR register. • Reset PC8 and PC9 by setting corresponding bits in BRR register. In this example, HCLK is configured at 48 MHz so PC8 and PC9 toggle at 12 MHz. To achieve the maximum I/O toggling frequency, you have to configure your compiler options for high speed optimization. 3.2 EXTI example Purpose This example shows how to configure an external interrupt line. Description In this example: • PA0 pin is configured in input floating. • PA0 is configured to be used as an external interrupt source line 0 (EXTI0). • The EXTI line 0 is configured to generate an interrupt on each rising edge detected on the PA0 pin. The interrupt is triggered every time the User push-button is pressed. • In the NVIC (nested vectored interrupt controller), the EXTI line 0 interrupt priority is configured and the interrupt is enabled. When the program is executed and the user pushes on the User push-button (EXTI0 interrupt routine), LED3 and LED4 connected to PC9 and PC8 are toggled. 3.3 SysTick example Purpose This example shows how to configure the system tick timer and use it to generate a 1 ms time base. |
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