AN4539 datasheet(29/33 Pages) STMICROELECTRONICS

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AN4539

Transition mode power factor controller

Figure 16. Transition mode PFC operation at Toff max and Toff min

The HRTIM is operating in continuous mode, and the TD1 signal is defined as follows:

•

Set on (TD CMP4 or (ZCDlatched. TDCMP2))

•

Reset on (TD CMP1 or (OC. TDCMP3))

ZCDlatched. TDCMP2 indicates that ZCD event is filtered by a blanking window starting from

Timer D counter reset and finishing at TD CMP2 match. The ZCD event is latched: if it

occurs during the blanking window, its is not discarded and is effective at the end of the

blanking period. The ZCD signal is applied on the External Event 4.

OC. TDCMP3 indicates that OC event is filtered by a blanking window starting from Timer D

counter reset and finishing at TD CMP3 match. The OC event is not latched: if it occurs

during the blanking window, it’s discarded. The OC signal is applied on the External Event 3.

Both Toff values (based on CMP2 and CMP4) are auto-delayed: these timings must be

relative to the output signal falling edge (occurring either on CMP1 match or OC event).

CMP2 and CMP4 events are generated in autodelayed mode with CMP1 timeout, based on

capture1 and capture 2 events respectively. The two capture units are triggered by the OC

signal (EEV3).

The timer D counter is reset either by the ZCD event or by CMP4 match (in timeout

conditions).

AN4539 Datasheet(PDF) 29 Page - STMicroelectronics