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LTC1604ACG Datasheet(PDF) 2 Page - Linear Technology

Part # LTC1604ACG
Description  High Speed, 16-Bit, 333ksps Sampling A/D Converter with Shutdown
PDF  20 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1604ACG Datasheet(HTML) 2 Page - Linear Technology

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LTC1604
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
ORDER
PART NUMBER
AVDD = DVDD = OVDD = VDD (Notes 1, 2)
Supply Voltage (VDD) ................................................ 6V
Negative Supply Voltage (VSS)................................ – 6V
Total Supply Voltage (VDD to VSS) .......................... 12V
Analog Input Voltage
(Note 3) ......................... (VSS – 0.3V) to (VDD + 0.3V)
VREF Voltage (Note 4) ................. –0.3V to (VDD + 0.3V)
REFCOMP Voltage (Note 4) ......... – 0.3V to (VDD + 0.3V)
Digital Input Voltage (Note 4) ....................– 0.3V to 10V
Digital Output Voltage .................. – 0.3V to (VDD + 0.3V)
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC1604C............................................... 0
°C to 70°C
LTC1604I ............................................ – 40
°C to 85°C
Storage Temperature Range ................ – 65
°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300
°C
TJMAX = 125°C, θJA = 95°C/W
Consult factory for Military grade parts.
CC
HARA TERISTICS
CO VERTER
With Internal Reference (Notes 5, 6)
LTC1604
LTC1604A
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Resolution (No Missing Codes)
q
15
16
16
16
Bits
Integral Linearity Error
(Note 7)
q
±1
±4
±0.5
±2
LSB
Transition Noise
(Note 8)
0.7
0.7
LSB
Offset Error
(Note 9)
q
±0.05 ±0.125
±0.05 ±0.125
%
Offset Tempco
(Note 9)
0.5
0.5
ppm/
°C
Full-Scale Error
Internal Reference
±0.125 ±0.25
±0.125 ±0.25
%
External Reference
±0.25
±0.25
%
Full-Scale Tempco
IOUT(Reference) = 0, Internal Reference
±15
±15
ppm/
°C
LTC1604CG
LTC1604IG
LTC1604ACG
LTC1604AIG
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIN
Analog Input Range (Note 2)
4.75
≤ VDD ≤ 5.25V, –5.25 ≤ VSS ≤ –4.75V,
±2.5
V
VSS ≤ (AIN–, AIN+) ≤ AVDD
IIN
Analog Input Leakage Current
CS = High
q
±1
µA
CIN
Analog Input Capacitance
Between Conversions
43
pF
During Conversions
5
pF
tACQ
Sample-and-Hold Acquisition Time
380
ns
tAP
Sample-and-Hold Acquisition Delay Time
– 1.5
ns
tjitter
Sample-and-Hold Acquisition Delay Time Jitter
5
psRMS
CMRR
Analog Input Common Mode Rejection Ratio
– 2.5V < (AIN
– = AIN+) < 2.5V
68
dB
PUT
I
A
A
LOG
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
TOP VIEW
G PACKAGE
36-LEAD PLASTIC SSOP
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
AVDD
AVDD
VSS
SHDN
CS
CONV
RD
OVDD
OGND
BUSY
D0
D1
D2
D3
D4
D5
D6
D7
AIN
+
AIN
–
VREF
REFCOMP
AGND
AGND
AGND
AGND
DVDD
DGND
D15 (MSB)
D14
D13
D12
D11
D10
D9
D8



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