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LTC1877 Datasheet(PDF) 13 Page - Linear Technology |
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LTC1877 Datasheet(HTML) 13 Page - Linear Technology |
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13 / 16 page ![]() 13 LTC1877 LTC1877. The power ground traces should be kept short, direct and wide. The signal ground and power ground should converge to a common node in a star- ground configuration. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be con- nected between the (+) plate of COUT and signal ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node SW away from sensitive small signal nodes. Design Example As a design example, assume the LTC1877 is used in a single lithium-ion battery-powered cellular phone applica- tion. The input voltage will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.3A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using equation (1), APPLICATIONS INFORMATION L fI V V V L OUT OUT IN = () ∆() − 1 1 (3) Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL=120mA and f = 550kHz in equation (3) gives: L V kHz mA V V H =− =µ 25 550 120 1 25 42 15 3 . () . . . A 15 µH inductor works well for this application. For best efficiency choose a 1A inductor with less than 0.25 Ω series resistance. CIN will require an RMS current rating of at least 0.15A at temperature and COUT will require an ESR of less than 0.25 Ω. In most applications, the requirements for these capacitors are fairly similar. For the feedback resistors, choose R1 = 412k. R2 can then be calculated from equation (2) to be: R V R k use k OUT 2 08 1 1 875 5 887 = = . –. ; Figure 8 shows the complete circuit along with its effi- ciency curve. – + RUN ITH VFB GND PLL LPF SYNC/MODE VIN SW LTC1877 CC2 CC1 RC COUT CIN 1877 F07 L1 R2 R2 R1 VIN BOLD LINES INDICATE HIGH CURRENT PATHS 1 2 3 4 8 7 6 5 OPTIONAL + + – + VOUT Figure 7. LTC1877 Layout Diagram |
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