LTC6945_15 datasheet(13/28 Pages) LINER

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LTC6945

6945fa

For more information www.linear.com/LTC6945

operaTion

Figure 7. Simplified RF Interface Schematic

bits, allowing a pre-charge of the loop to a known state,

if required. CPUP, CPDN, and CPRST must be set to “0”

to allow the loop to lock.

The CPWIDE bit extends the charge pump output current

pulse width by increasing the PFD reset path’s delay value

(see Figure 3). CPWIDE is normally set to 0.

VCO INPUT BUFFER

TheVCOfrequencyisapplieddifferentiallyonpinsVCO+and

VCO–. The inputs are self-biased and must be AC-coupled.

Alternatively, the inputs may be used single-ended by ap-

plying the VCO frequency at VCO+ and bypassing VCO– to

GND with a capacitor. Each input provides a single-ended

OUTPUT (O) DIVIDER

The 3-bit O divider can reduce the frequency from the VCO

input buffer to the RF output buffer to extend the output

frequency range. Its divide ratio O may be set to any in-

teger from 1 to 6, inclusive, outputting a 50% duty cycle

even with odd divide values. Use the OD[2:0] bits found

in register h08 to directly program the 0 divide ratio. See

the Applications Information section for the relationship

between O and the fREF, fPFD, fVCO and fRF frequencies.

RF OUTPUT BUFFER

The low noise, differential output buffer produces a dif-

ferential output power of –6dBm to 3dBm, settable with

bits RFO[1:0] according to Table 7. The outputs may be

combined externally, or used individually. Terminate any

unused output with a 50Ω resistor to VRF+.

Table 7. RFO[1:0] Programming

RFO[1:0}

PRF (Differential)

PRF (Single-Ended)

–6dBm

–9dBm

–3dBm

–6dBm

0dBm

–3dBm

3dBm

0dBm

Each output is open collector with 136Ω pull-up resistors

to VRF+, easing impedance matching at high frequencies.

See Figure 7 for circuit details and the Applications Infor-

mation section for matching guidelines. The buffer may be

muted with either the OMUTE bit, found in register h02,

or by forcing the MUTE input low.

121

VCO+

VC0–

121

6945 F06

0.9V

VVCO+

+–

Figure 6. Simplified VCO Interface Schematic

121Ω resistance to aid in impedance matching at high

frequencies. See the Applications Information section for

matching guidelines.

VCO (N) DIVIDER

The 16-bit N divider provides the feedback from the VCO

input buffer to the PFD. Its divide ratio N may be set to any

integer from 32 to 65535, inclusive. Use the ND[15:0] bits

found in registers h05 and h06 to directly program the N

divide ratio. See the Applications Information section for

the relationship between N and the fREF, fPFD, fVCO and

fRF frequencies.

6945 F07

VRF+

RF+

136

RF–

MUTE

OMUTE

RFO[1:0]

MUTE

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