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S93C76A Datasheet(PDF) 13 Page - Seiko Instruments Inc

Part # S93C76A
Description  FOR AUTOMOTIVE 105C OPERATION
PDF  28 Pages
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Manufacturer  SII [Seiko Instruments Inc]
Direct Link  http://www.sii.co.jp
Logo SII - Seiko Instruments Inc

S93C76A Datasheet(HTML) 13 Page - Seiko Instruments Inc

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FOR AUTOMOTIVE 105
°C OPERATION 3-WIRE SERIAL E
2PROM
Rev.3.1_00
S-93C76A H Series
Seiko Instruments Inc.
13
3. Write enable (EWEN) and write disable (EWDS)
The EWEN instruction is used to enable a write operation. The status in which a write operation is enabled is
called the program-enabled mode.
The EWDS instruction is used to disable a write operation. The status in which a write operation is disabled is
called the program-disabled mode.
The write operation is disabled upon power application and detection of a low supply voltage. To prevent an
unexpected write operation due to external noise or a CPU malfunctions, it should be kept in write disable mode
except when performing write operations, after power-on and before shutdown.
<1>
2
3
4
5
6
7
8
9
10
11
12
13
DI
SK
CS
11 = EWEN
00 = EWDS
Standby
1
8Xs
0
0
Figure 11 Write Enable/Disable Timing
Start Bit
A start bit is recognized by latching the high level of DI at the rising edge of SK after changing CS to high (start bit
recognition). A write operation begins by inputting the write instruction and setting CS to low. Subsequently, by setting
CS to high again, the DO pin outputs a low level if the write operation is still in progress and a high level if the write
operation is complete (verify operation). Therefore, only after a write operation, in order to input the next command, CS
is set to high, which switches the DO pin from a high-impedance state (High-Z) to a data output state. However, if start
bit is recognized, the DO pin returns to the high-impedance state (refer to Figure 5 Timing Chart).
Make sure that data output from the CPU does not interfere with the data output from the serial memory IC when
configuring a 3 -wire interface by connecting the DI input pin and DO output pin, as such interference may cause a start
bit fetch problem. Take the measures described in “ 3-Wire Interface (Direct Connection between DI and DO)”.



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