Calling Line Identifier

CMX602B

 2003 CML Microsystems Plc

21

D/602B/2

Notes

Min.

Typ.

Max.

Units

FSK Receiver

Transmission rate

1188

1200

1212

Baud

V23 Mark (logical 1) frequency

1280

1300

1320

Hz

V23 Space (logical 0) frequency

2068

2100

2132

Hz

Bell202 Mark (logical 1) frequency

1188

1200

1212

Hz

Bell202 Space (logical 0) frequency

2178

2200

2222

Hz

Valid input level range

4

-40.0

-8.0

dBV

Acceptable twist (mark level wrt space level)

V23

-6.0

+6.0

dB

Bell202

-10.0

+10.0

dB

Acceptable Signal to Noise ratio

V23

5

20.0

dB

Bell202

5

30.0

dB

Level Detector 'on' threshold level

4

-40.0

dBV

Level Detector 'off' to 'on' time (Fig 4 Teon)

25.0

ms

Level Detector 'on' to 'off' time (Fig 4 Teoff)

8.0

ms

Input Signal Amplifier

Input impedance

7

10.0

M

Ω

Voltage gain

500

V/V

XTAL Input

'High' pulse width

8

100

ns

'Low' pulse width

8

100

ns

Notes:

1.

At 25

°C, not including any current drawn from the CMX602B pins by external circuitry

other than X1, C1 and C2.

2.

3.

All conditions must be met to ensure detection.

4.

cater for other supply voltages or different signal level ranges the voltage gain of the input

signal amplifier should be adjusted by selecting the appropriate external components as

described in section 1.5

5.

Flat noise in 300 - 3400Hz band for V23, 200 - 3200Hz for Bell202.

6.

Meeting any of these conditions will ensure non-detection.

7.

Open loop, small signal low frequency measurements.

8.

Timing for an external input to the CLOCK/XTAL pin.