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LM5002MA/NOPB Datasheet(PDF) 11 Page - Texas Instruments |
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LM5002MA/NOPB Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 24 page ![]() 10 VIN VPWR 0.1 PF LM5002 LM5002 www.ti.com SNVS496D – JANUARY 2007 – REVISED MARCH 2013 APPLICATION INFORMATION The following information is intended to provide guidelines for the power supply designer using the LM5002. VIN The voltage applied to the VIN pin can vary within the range of 3.1V to 75V. The current into the VIN pin depends primarily on the gate charge of the power MOSFET, the switching frequency, and any external load on the VCC pin. It is recommended the filter shown in Figure 17 be used to suppress transients which may occur at the input supply. This is particularly important when VIN is operated close to the maximum operating rating of the LM5002. When power is applied and the VIN voltage exceeds 2.8V with the EN pin voltage greater than 0.45V, the VCC regulator is enabled, supplying current into the external capacitor connected to the VCC pin. When the VIN voltage is between 2.8V and 6.9V, the VCC voltage is approximately equal to the VIN voltage. When the voltage on the VCC pin exceeds 6.9V, the VCC pin voltage is regulated at 6.9V. In typical flyback applications, an auxiliary transformer winding is connected through a diode to the VCC pin. This winding must raise the VCC voltage above 6.9V to shut off the internal start-up regulator. The current requirements from this winding are relatively small, typically less than 20 mA. If the VIN voltage is much higher than the auxiliary voltage, the auxiliary winding will significantly improve conversion efficiency. It also reduces the power dissipation within the LM5002. The externally applied VCC voltage should never exceed 14V. Also the applied VCC should never exceed the VIN voltage to avoid reverse current through the internal VCC to VIN diode shown in the LM5002 Block Diagram. Figure 17. Input Transient Protection SW PIN Attention must be given to the PC board layout for the SW pin which connects to the power MOSFET drain. Energy can be stored in parasitic inductance and capacitance which cause switching spikes that negatively effect efficiency, and conducted and radiated emissions. These connections should be as short as possible to reduce inductance and as wide as possible to reduce resistance. The loop area, defined by the SW and GND pin connections, the transformer or inductor terminals, and their respective return paths, should be minimized. EN / UVLO VOLTAGE DIVIDER SELECTION Two dedicated comparators connected to the EN pin are used to detect under-voltage and shutdown conditions. When the EN pin voltage is below 0.45V, the controller is in a low current shutdown mode where the VIN current is reduced to 95 µA. For an EN pin voltage greater than 0.45V but less than 1.26V the controller is in standby mode, with all internal circuits operational, but the PWM gate driver signal is blocked. Once the EN pin voltage is greater than 1.26V, the controller is fully enabled. Two external resistors can be used to program the minimum operational voltage for the power converter as shown in Figure 18. When the EN pin voltage falls below the 1.26V threshold, an internal 100 mV threshold hysteresis prevents noise from toggling the state, so the voltage must be reduced to 1.16V to transition to standby. Resistance values for R1 and R2 can be determined from the following equations: Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM5002 |
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