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LP2989IM-1.8/NOPB Datasheet(PDF) 13 Page - Texas Instruments |
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LP2989IM-1.8/NOPB Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 26 page ![]() LP2989LV www.ti.com SNVS086K – MAY 2000 – REVISED JULY 2015 Figure 13. Stable Region for Output Capacitor ESR NOTE Important: The output capacitor must maintain its ESR within the stable region over the full operating temperature range of the application to assure stability. It is important to remember that capacitor tolerance and variation with temperature must be considered when selecting an output capacitor so that the minimum required amount of output capacitance is provided over the full operating temperature range. (See Capacitor Characteristics.) The output capacitor must be located not more than 0.5 inches from the OUT pin and returned to a clean analog ground. 8.2.2.2.3 Noise Bypass Capacitor Connecting a 10-nF capacitor to the BYPASS pin significantly reduces noise on the regulator output. However, the capacitor is connected directly to a high-impedance circuit in the bandgap reference. Because this circuit has only a few microamperes flowing in it, any significant loading on this node causes the regulated output voltage to drop. For this reason, DC leakage current through the noise bypass capacitor must never exceed 100 nA, and must be kept as low as possible for best output voltage accuracy. The types of capacitors best suited for the noise bypass capacitor are ceramic and film. High-quality ceramic capacitors with either NPO or COG dielectric typically have very low leakage. 10-nF polypropolene and polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low leakage current. 8.2.2.3 Capacitor Characteristics 8.2.2.3.1 Ceramic The LP2989LV was designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the 10 µF range, ceramics are the least expensive and also have the lowest ESR values (which makes them best for eliminating high-frequency noise). The ESR of a typical 10-µF ceramic capacitor is in the range of 5 m Ω to 10 mΩ, which easily meets the ESR limits required for stability by the LP2989LV. One disadvantage of ceramic capacitors is that their capacitance can vary with temperature. Many large-value ceramic capacitors ( ≥ 2.2 µF) are manufactured with the Z5U or Y5V temperature characteristic, which results in the capacitance dropping by more than 50% as the temperature goes from 25°C to 85°C. This could cause problems if a 10-µF Y5V capacitor were used on the output because it drops down to approximately 5 µF at high ambient temperatures (which could cause the LP2989LV to oscillate). Another significant problem with Z5U and Y5V dielectric devices is that the capacitance drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. For these reasons, X7R and X5R type ceramic capacitors must be used on the input and output of the LP2989LV. Copyright © 2000–2015, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LP2989LV |
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