PIC17C752-08SLASHCL datasheet(249/328 Pages) MICROCHIP

249 / 328 page

Preliminary

DS30289A-page 249

PIC17C7XX

FIGURE 20-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,

AND BROWN-OUT RESET TIMING

TABLE 20-4:

RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,

AND BROWN-OUT RESET REQUIREMENTS

Param.

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

TmcL

MCLR Pulse Width (low)

100 *

—

VDD = 5V

TWDT

Watchdog Timer Time-out Period

(Postscale = 1)

5 *

25 *

VDD = 5V

TOST

Oscillation Start-up Timer Period

—

1024TOSC§

—

TOSC = OSC1 period

TPWRT

Power-up Timer Period

40 *

200 *

VDD = 5V

TIOZ

MCLR to I/O hi-impedance

100 ‡

—

Depends on pin load

TmcL2adI

MCLR to System

Interface bus

(AD15:AD0>) invalid

PIC17C7XX

—

100 *

PIC17LC7XX

—

120 *

TBOR

Brown-out Reset Pulse Width (low)

100 *

—

3.9V

≤ VDD ≤ 4.2V

These parameters are characterized but not tested.

†

Data in “Typ” column is at 5V, 25

∞C unless otherwise stated. These parameters are for design guidance only and are

not tested.

‡

These parameters are for design guidance only and are not tested, nor characterized.

This speciﬁcation ensured by design.

VDD

MCLR

Internal

POR / BOR

PWRT

Time-out

OSC

Time-out

Internal

RESET

Watchdog

Timer

RESET

Address /

Data

PIC17C752-08/CL Datasheet(PDF) 249 Page - Microchip Technology

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