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PIC17C752-08/CL Datasheet(PDF) 311 Page - Microchip Technology |
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PIC17C752-08/CL Datasheet(HTML) 311 Page - Microchip Technology |
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311 / 328 page  © 1998 Microchip Technology Inc. DS30289A-page 311 PIC17C7XX INDEX A A/D Accuracy/Error .......................................................... 187 ADCON0 Register..................................................... 177 ADCON1 Register..................................................... 178 ADIF bit ..................................................................... 179 Analog Input Model Block Diagram........................... 182 Analog-to-Digital Converter....................................... 177 Block Diagram........................................................... 179 Configuring Analog Port Pins.................................... 184 Configuring the Interrupt ........................................... 179 Configuring the Module............................................. 179 Connection Considerations....................................... 187 Conversion Clock...................................................... 183 Conversions .............................................................. 184 Converter Characteristics ......................................... 260 Delays ....................................................................... 181 Effects of a Reset...................................................... 186 Equations .................................................................. 181 Flowchart of A/D Operation....................................... 185 GO/DONE bit ............................................................ 179 Internal Sampling Switch (Rss) Impedence .............. 181 Operation During Sleep ............................................ 186 Sampling Requirements............................................ 181 Sampling Time .......................................................... 181 Source Impedence.................................................... 181 Time Delays .............................................................. 181 Transfer Function...................................................... 187 A/D Interrupt................................................................ 36, 299 A/D Interrupt Flag bit, ADIF......................................... 36, 299 A/D Module Interrupt Enable, ADIE ............................ 34, 297 ACK........................................................................... 142, 286 Acknowledge Data bit, AKD .............................................. 134 Acknowledge Data bitr, AKD............................................. 309 Acknowledge Pulse........................................................... 142 Acknowledge Sequence Enable bit, AKE ................. 134, 309 Acknowledge Status bit, AKS ................................... 134, 309 ADCON0 ............................................................................. 47 ADCON1 ............................................................................. 47 ADDLW ............................................................................. 200 ADDWF ............................................................................. 200 ADDWFC .......................................................................... 201 ADIE............................................................................ 34, 297 ADIF ............................................................................ 36, 299 ADRES Register ............................................................... 177 ADRESH ............................................................................. 47 ADRESL.............................................................................. 47 AKD........................................................................... 134, 309 AKE ........................................................................... 134, 309 AKS ................................................................... 134, 157, 309 ALU ....................................................................................... 9 ALUSTA ...................................................................... 46, 196 ALUSTA Register................................................................ 49 ANDLW ............................................................................. 201 ANDWF ............................................................................. 202 Application Note AN552,'Implementing Wake-up on Keystroke.' ..................................................................... 72 Application Note AN578, "Use of the SSP Module in the I2C Multi-Master Environment." .............................. 141 Assembler MPASM Assembler................................................... 232 Asynchronous Master Transmission ................................. 122 Asynchronous Transmitter ................................................ 121 B Bank Select Register (BSR)................................................ 56 Banking ......................................................................... 44, 56 Baud Rate Formula .......................................................... 118 Baud Rate Generator ....................................................... 151 Baud Rate Generator (BRG) ............................................ 118 Baud Rates Asynchronous Mode................................................. 120 Synchronous Mode................................................... 119 BCF .................................................................................. 202 BCLIE ......................................................................... 34, 297 BCLIF ......................................................................... 36, 299 BF ..................................................... 132, 142, 157, 160, 307 Bit Manipulation ................................................................ 196 Block Diagrams A/D............................................................................ 179 Analog Input Model................................................... 182 Baud Rate Generator ............................................... 151 BSR Operation ........................................................... 56 External Brown-out Protection Circuit (Case1)........... 29 External Power-on Reset Circuit ................................ 22 External Program Memory Connection ...................... 43 I2C Master Mode ...................................................... 149 I2C Module................................................................ 141 Indirect Addressing..................................................... 53 On-chip Reset Circuit ................................................. 21 PORTD ....................................................................... 78 PORTE ........................................................... 80, 88, 89 Program Counter Operation ....................................... 55 PWM......................................................................... 105 RA0 and RA1.............................................................. 70 RA2............................................................................. 70 RA3............................................................................. 71 RA4 and RA5.............................................................. 71 RB3:RB2 Port Pins ..................................................... 73 RB7:RB4 and RB1:RB0 Port Pins .............................. 72 RC7:RC0 Port Pins..................................................... 76 SSP (I2C Mode)........................................................ 141 SSP (SPI Mode) ....................................................... 135 SSP Module (I2C Master Mode) ............................... 131 SSP Module (I2C Slave Mode) ................................. 131 SSP Module (SPI Mode) .......................................... 131 Timer3 with One Capture and One Period Register .................................................................... 108 TMR1 and TMR2 in 16-bit Timer/Counter Mode ...... 103 TMR1 and TMR2 in Two 8-bit Timer/Counter Mode......................................................................... 102 TMR3 with Two Capture Registers........................... 110 Using CALL, GOTO.................................................... 55 WDT ......................................................................... 191 BODEN ............................................................................... 29 Borrow ...................................................................................9 BRG .......................................................................... 118, 151 Brown-out Protection .......................................................... 29 Brown-out Reset (BOR)...................................................... 29 BSF................................................................................... 203 BSR .............................................................................. 46, 56 BSR Operation ................................................................... 56 BTFSC .............................................................................. 203 BTFSS .............................................................................. 204 BTG .................................................................................. 204 Buffer Full bit, BF .............................................................. 142 Buffer Full Status bit, BF........................................... 132, 307 Bus Arbitration .................................................................. 168 Bus Collision Section...................................................................... 168 Bus Collision During a RESTART Condition .................... 171 Bus Collision During a Start Condition ............................. 169 Bus Collision During a Stop Condition.............................. 172 Bus Collision Interrupt Enable, BCLIE ........................ 34, 297 Bus Collision Interrupt Flag bit, BCLIF ....................... 36, 299 |
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