TC7660HCPA datasheet(3/8 Pages) MICROCHIP

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HIGH FREQUENCY 7660 DC-TO-DC

VOLTAGE CONVERTER

TC7660H

TC7660H-2 10/1/96

DS21466A

Detailed Description

The TC7660H contains all the necessary circuitry to

implement a voltage inverter, with the exception of two

external capacitors, which may be inexpensive 1.0

µF

non-polarized capacitors. Operation is best understood by

considering Figure 2, which shows an idealized voltage

inverter. Capacitor C1 is charged to a voltage, V+, for the half

cycle when switches S1 and S3 are closed. (Note: Switches

S2 and S4 are open during this half cycle.) During the second

half cycle of operation, switches S2 and S4 are closed, with

S1 and S3 open, thereby shifting capacitor C1 negatively by

V+ volts. Charge is then transferred from C1 to C2, such that

the voltage on C2 is exactly V+, assuming ideal switches and

no load on C2.

V+

GND

VOUT

= – VIN

Figure 2. Idealized Charge Pump Inverter

Figure 1. TC7660H Test Circuit

TC7660H

V+

(+5V)

1.0

µF

1.0

µF

To improve low-voltage operation, the LV pin should be

connected to GND. For supply voltages greater than 3.5V,

the LV terminal must be left open to ensure latch-up-

proof operation and prevent device damage.

Theoretical Power Efficiency Considerations

In theory, a capacitative charge pump can approach

100% efficiency if certain conditions are met:

(1) The drive circuitry consumes minimal power.

(2) The output switches have extremely low ON

resistance and virtually no offset.

(3) The impedances of the pump and reservoir

capacitors are negligible at the pump frequency.

The TC7660H approaches these conditions for nega-

tive voltage multiplication if large values of C1 and C2 are

used. Energy is lost only in the transfer of charge

between capacitors if a change in voltage occurs. The

energy lost is defined by:

E = 1/2 C1 (V12 – V22)

V1 and V2 are the voltages on C1 during the pump and

transfer cycles. If the impedances of C1 and C2 are relatively

high at the pump frequency (refer to Figure 1), compared to

the value of RL, there will be a substantial difference in

voltages V1 and V2. Therefore, it is not only desirable to

make C2 as large as possible to eliminate output voltage

ripple, but also to employ a correspondingly large value for

C1 in order to achieve maximum efficiency of operation.

Do's and Don'ts

• Do not exceed maximum supply voltages.

• Do not connect LV terminal to GND for supply voltages

greater than 3.5V.

• Do not short circuit the output to V+ supply for voltages

above 5.5V for extended periods; however, transient

conditions including start-up are okay.

• When using polarized capacitors in the inverting mode,

the + terminal of C1 must be connected to pin 2 of the

TC7660H and the + terminal of C2 must be connected

to GND Pin 3.

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