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TC850CPL Datasheet(PDF) 19 Page - Microchip Technology |
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TC850CPL Datasheet(HTML) 19 Page - Microchip Technology |
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19 / 26 page  © 2006 Microchip Technology Inc. DS21479C-page 19 TC850 FIGURE 8-6: Conversion Timing, Continuous Mode FIGURE 8-7: Bus Output Timing, Continuous Mode DB0-DB7 Busy Internal Clock Data Meaningless Data Valid Data Meaningless 1/2 Clock Cycle 836 Clock Cycles 1280 Internal Clock Cycles 443-1/2 Clock Cycles . . . . . . . . . . . . . . . . . RD BUSY CONT/DEMAND DB0-DB7 NOTES: CS = HIGH; CE = LOW Data Bits 0-7 Data Bits 8-14 Overrange High-Impedance State HI-Z TRE TWRE TWRD Data Bits 8-14 Polarity |
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