LM5027A

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SNVS642B – APRIL 2010 – REVISED MARCH 2013

Cycle-by-Cycle Current Limit

The CS pin is to be driven by a signal representative of the transformer primary current. If the voltage on the CS

pin exceeds 0.5V, the current sense comparator terminates the output driver pulse, with the duty cycle

determined by the current sense comparator instead of the PWM comparator. A small R-C filter connected to the

CS pin and located near the controller is recommended to suppress noise. An internal 5

Ω MOSFET discharges

the external current sense filter capacitor at the conclusion of every cycle. The discharge MOSFET remains on

for an additional 30 ns after either OUTA driver switches high to blank leading edge transients in the current

sensing circuit. Discharging the CS pin filter each cycle and blanking leading edge spikes reduces the filtering

requirements and improves the current sense response time. The current sense comparator is very fast and may

respond to short duration noise pulses. Layout considerations are critical for the current sense filter and sense

resistor. The capacitor associated with the CS filter must be placed very close to the device and connected

directly to the CS and AGND pins. If a current sense transformer is used, both leads of the transformer

secondary should be routed to the filter network, which should be located close to the IC. When designing with a

current sense resistor, all of the noise sensitive low power ground connections should be connected together

near the AGND pin, and a single connection should be made to the power ground (sense resistor ground point).

Restart Time Delay (Hiccup Mode)

The LM5027A provides a current limit restart timer to disable the outputs and force a delayed restart (hiccup

mode) if a current limit condition is repeatedly sensed. The number of cycle-by-cycle current limit events required

to trigger the restart is programmable by the external capacitor at the RES pin. During each PWM cycle, the

LM5027A either sources or sinks current from the RES pin capacitor. If no current limit is detected during a cycle,

a 5 µA current sink is enabled to pull the RES pin to ground. If a current limit is detected, the 5 µA current sink is

disabled and a 22 µA current source causes the voltage at the RES pin to gradually increase. If the RES voltage

reaches the 1.0V threshold, the following restart sequence occurs (also see Figure 19).

• The SS and SSSR capacitors are fully discharged.

• The RES 20 µA current source is turned-off and the 5 µA current source is turned-on.

• The voltage on the RES pin is allowed to charge up to 4.0V.

• When voltage on the RES pin reaches 4.0V the 5 µA current source is turned-off and a 5 µA current sink is

turned-on, ramping the voltage on the RES capacitor down to 2.0V.

• The RES capacitor voltage is ramped between 4.0V and 2.0V eight times.

• When the counter reaches eight, the RES pin voltage is pulled low and the Soft-Start capacitor is released to

begin a soft-start sequence. The SS capacitor voltage slowly increases. When the SS voltage reaches 1.0V, the

PWM comparator will produce the first narrow output pulse at OUTA.

• When the SS voltage reaches 4.0V the capacitor on the SSSR pin is released and is charged with a 25 µA

current source, soft-starting the free-wheeling synchronous rectifier.

• If the overload condition persists after restart, cycle-by-cycle current limiting will begin to increase the voltage

on the RES capacitor again, repeating the hiccup mode sequence.

• If the overload condition no longer exists after restart, the RES pin will be held at ground by the 5 µA current

sink and normal operation resumes.

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