MMSF2P02ER2 datasheet(5/9 Pages) ONSEMI

5 / 9 page

MMSF2P02E

http://onsemi.com

RG, GATE RESISTANCE (OHMS)

100

Figure 9. Resistive Switching Time Variation

versus Gate Resistance

100

VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

0.4

0.8

1.2

Figure 10. Diode Forward Voltage

versus Current

1.6

0.6

0.8

1.2

1.4

1.6

TJ = 25°C

VGS = 0 V

VDD = 10 V

ID = 2 A

VGS = 10 V

TJ = 25°C

td(off)

td(on)

Figure 11. Reverse Recovery Time (trr)

Figure 12. Maximum Rated Forward Biased

Safe Operating Area

t, TIME

di/dt = 300 A/

μs

Standard Cell Density

High Cell Density

trr

0.1

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

RDS(on) LIMIT

THERMAL LIMIT

PACKAGE LIMIT

0.01

VGS = 20 V

SINGLE PULSE

TC = 25°C

0.1

10 ms

100

Mounted on 2

″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″

thick single sided), 10s max.

1 ms

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