ADA4806-1ARJZ-R2 datasheet(18/24 Pages) AD

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ADA4806-1

Data Sheet

THEORY OF OPERATION

AMPLIFIER DESCRIPTION

The ADA4806-1 has a bandwidth of 105 MHz and a slew rate of

160 V/µs. It has an input referred voltage noise of only 5.9 nV/√Hz.

The ADA4806-1 operates over a supply voltage range of 2.7 V to

10 V and consumes only 500 µA of supply current at VS = 5 V. The

low end of the supply range allows −10% variation of a 3 V supply.

The amplifier is unity-gain stable, and the input structure results in

an extremely low input 1/f noise. The ADA4806-1 uses a slew

enhancement architecture, as shown in Figure 52. The slew

enhancement circuit detects the absolute difference between the

two inputs. It then modulates the tail current, ITAIL, of the input

stage to boost the slew rate. The architecture allows a higher

slew rate and fast settling time with low quiescent current while

maintaining low noise.

+IN

VIN+

VIN–

+VS

INPUT

STAGE

TO DETECT

ABSOLUTE

VALUE

SLEW ENHANCEMENT CIRCUIT

ITAIL

–IN

Figure 52. Slew Enhancement Circuit

INPUT PROTECTION

The ADA4806-1 is fully protected from ESD events,

withstanding human body model ESD events of ±3.5 kV and

charged device model events of ±1.25 kV with no measured

performance degradation. The precision input is protected with

an ESD network between the power supplies and diode clamps

across the input device pair, as shown in Figure 53.

+IN

ESD

–VS

+VS

BIAS

TO THE REST OF THE AMPLIFIER

–IN

ESD

Figure 53. Input Stage and Protection Diodes

For differential voltages above approximately 1.2 V at room

temperature, and 0.8 V at 125°C, the diode clamps begin to

conduct. If large differential voltages must be sustained across

the input terminals, the current through the input clamps must

be limited to less than 10 mA. Series input resistors that are sized

appropriately for the expected differential overvoltage provide

the needed protection.

The ESD clamps begin to conduct for input voltages that are

more than 0.7 V above the positive supply and input voltages

more than 0.7 V below the negative supply. If an overvoltage

condition is expected, the input current must be limited to less

than 10 mA.

SHUTDOWN/SLEEP MODE OPERATION

Figure 54 shows the ADA4806-1 shutdown circuitry. To

maintain very low supply current in shutdown mode, no internal

pull-up resistor is supplied; therefore, the SHUTDOWN pin must

be driven high or low externally and must not be left floating.

Pulling the SHUTDOWN pin to ≥1 V below midsupply turns the

device off, reducing the supply current to 2.9 µA for a 5 V supply.

When the amplifier is powered down, its output enters a high

impedance state. The output impedance decreases as frequency

increases. In shutdown mode, a forward isolation of −62 dB can

be achieved at 100 kHz (see Figure 21).

A second circuit similar to Figure 54 is used for sleep mode

operation. Pulling the SLEEP pin low places the amplifier in a low

power state, drawing only 74 µA from a 5 V supply. Leaving the

amplifier biased on at a very low level greatly reduces the turn-

on time from sleep to full power mode, thus enabling dynamic

power scaling of the ADA4806-1 at higher sample rates.

The ADA4806-1 is not characterized for operation in sleep mode.

+VS

–VS

SHUTDOWN

ESD

2.2R

1.8R

1.1V

TO ENABLE

AMPLIFIER

Figure 54. Shutdown/Sleep Equivalent Circuit

The SHUTDOWN pin and the SLEEP pin are protected by ESD

clamps, as shown in Figure 54. Voltages beyond the power supplies

cause these diodes to conduct. To protect the SHUTDOWN and

SLEEP pins, ensure that the voltage to these pins does not

exceed 0.7 V above the positive supply or 0.7 V below the

negative supply. If an overvoltage condition is expected, the

input current must be limited to less than 10 mA with a series

resistor.

Rev. 0 | Page 18 of 24

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