R

P

SDA

SCL

Master

Slave

CDCE913

CDCEL913

C

BUS

C

BUS

R

P

CDCE913, CDCEL913

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SCAS849F – JUNE 2007 – REVISED APRIL 2015

8.3.4 Data Protocol

The device supports Byte Write and Byte Read and Block Write and Block Read operations.

For Byte Write/Read operations, the system controller can individually access addressed bytes.

For Block Write/Read operations, the bytes are accessed in sequential order from lowest to highest byte (with

most-significant bit first) with the ability to stop after any complete byte has been transferred. The numbers of

bytes read out are defined by Byte Count in the generic configuration register. At the Block Read instruction, all

bytes defined in Byte Count must be read out to finish the read cycle correctly.

Once a byte has been sent, it is written into the internal register and is effective immediately. This applies to

each transferred byte, regardless of whether this is a Byte Write or a Block Write sequence.

If the EEPROM write cycle is initiated, the internal SDA registers are written into the EEPROM. During this write

cycle, data is not accepted at the SDA/SCL bus until the write cycle is completed. However, data can be read out

during the programming sequence (Byte Read or Block Read). The programming status can be monitored by

EEPIP, byte 01h–bit 6.

The offset of the indexed byte is encoded in the command code, as described in Table 7.

Table 7. Slave Receiver Address (7 Bits)

DEVICE

A6

A5

A4

A3

A2

R/W

CDCE913/CDCEL913

1

1

0

0

1

0

1

1/0

CDCE925/CDCEL925

1

1

0

0

1

0

0

1/0

CDCE937/CDCEL937

1

1

0

1

1

0

1

1/0

CDCE949/CDCEL949

1

1

0

1

1

0

0

1/0

(1)

Address bits A0 and A1 are programmable through the SDA/SCL bus (byte 01, bits [1:0]. This allows addressing up to 4 devices

connected to the same SDA/SCL bus. The least-significant bit of the address byte designates a write or read operation.

8.4 Device Functional Modes

8.4.1 SDA/SCL Hardware Interface

Figure 7 shows how the CDCE913/CDCEL913 clock synthesizer is connected to the SDA/SCL serial interface

bus. Multiple devices can be connected to the bus, but it may be necessary to reduce the speed (400 kHz is the

maximum) if many devices are connected.

devices. The recommended pullup value is 4.7 k

Ω. It must meet the minimum sink current of 3 mA at

Figure 7. SDA / SCL Hardware Interface

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