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LAN8810 Datasheet(PDF) 8 Page - Microchip Technology |
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LAN8810 Datasheet(HTML) 8 Page - Microchip Technology |
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8 / 83 page  LAN8810/LAN8810I DS00001870B-page 8 2009-2015 Microchip Technology Inc. Note 2-2 Configuration strap values are latched on hardware reset. Configuration straps are identified by an underlined symbol name. Signals that function as configuration straps must be augmented with an external resistor when connected to a load. Refer to Section 3.8, "Configuration," on page 23 for additional information. TABLE 2-3: LED & CONFIGURATION PINS Num Pins Name Symbols Buffer Type Description 1 10BASE-T Link LED Indicator 10_LED VO8 10BASE-T LED link indication. Refer to Section 3.9.1, "LEDs," on page 27 for additional information. 1 100BASE-TX Link LED Indicator 100_LED VO8 100BASE-TX LED link indication. Refer to Section 3.9.1, "LEDs," on page 27 for additional information. Hardware Power Down (HPD) Mode Configuration Strap HPD_MODE VIS (PD) This configuration strap is used to select the Hardware Power Down (HPD) mode. When pulled- up, the PLL is not disabled when HPD is asserted. When pulled-down, the PLL is disabled when HPD is asserted. Refer to Section 3.7.3, "Hardware Power-Down," on page 23 for additional information. See Note 2-2 for more information on configuration straps. 1 1000BASE-T Link LED Indicator 1000_LED VO8 1000BASE-T LED link indication. Refer to Section 3.9.1, "LEDs," on page 26 for additional information. 1 Link Activity LED Indicator ACT_LED VO8 Link activity LED indication. Refer to Section 3.9.1, "LEDs," on page 26 for additional information. 1 Configuration Input 0 CONFIG0 VIS (PD) This pin sets the PHYADD[1:0] bits of the 10/100 Special Modes Register on reset or power-up. It must be connected to VSS, 100_LED, 1000_LED, or VDDVARIO. Refer to Section 3.8.1.2, "CONFIG[3:0] Configuration Pins," on page 24 for additional information. 1 Configuration Input 1 CONFIG1 VIS (PD) This pin sets the PAUSE bit of the Auto Negotiation Advertisement Register and PHYADD [2] bit of the 10/100 Special Modes Register on reset or power- up. It must be connected to VSS, 100_LED, 1000_LED, or VDDVARIO. Refer to Section 3.8.1.2, "CONFIG[3:0] Configuration Pins," on page 24 for additional information. 1 Configuration Input 2 CONFIG2 VIS (PD) This pin sets the MOD[1:0] bits of the Extended Mode Control/Status Register on reset or power- up. It must be connected to VSS, 100_LED, 1000_LED, or VDDVARIO. Refer to Section 3.8.1.2, "CONFIG[3:0] Configuration Pins," on page 24 for additional information. 1 Configuration Input 3 CONFIG3 VIS (PD) This pin sets the MOD[3] bit of the Extended Mode Control/Status Register on reset or power-up. It must be connected to 1000_LED or VDDVARIO. Refer to Section 3.8.1.2, "CONFIG[3:0] Configuration Pins," on page 24 for additional information. |
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