L7292D datasheet(34/60 Pages) STMICROELECTRONICS

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L7292

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DocID028601 Rev 1

9.2.4

PSRxLV.PSRxLVEN - voltage level selection enable



0: voltage level selection register disabled; voltage level is selected via MOD pins.



1: voltage level selection register enabled; output voltage changed according to the

9.2.5

PSRxLV.PSRxOCDIS - overcurrent disable



0: overcurrent for the regulator is enabled.



1: overcurrent for the regulator is disabled.

9.2.6

PSRxCFG.PFMDIS - PFM disable



0: PFM mode enabled.



1: PWM mode forced in the light-load mode.

9.2.7

YYYxCFG.ORDER - order in power up sequence



0x0: first regulator to be turned on.



0x1: second regulator to be turned on.



…



0x5 - 0x7: last regulator to be turned on.

9.2.8

PSRxCFG.RSLEW - driver slew rate



0x0: 500 V/

s



0x1: 1000 V/

s



0x2 1500 V/

s



0x3: 2000 V

s

9.2.9

PSRxCFG.LSDIS - low side disable



0: low side enabled.



1: low side disabled.

9.2.10

YYYxCFG.UVM - mask undervoltage fault



0: undervoltage generates fault.



1: undervoltage does not generate fault.

9.2.11

SEQCFG.DLY2 - Delay 2

Delay between two sequence steps.



0x0: 0 ms / no delay



0x1: 0.5 ms



0x2: 1.0 ms



0x3: 2.0 ms

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