M35B32 datasheet(26/44 Pages) STMICROELECTRONICS

26 / 44 page

Instructions

M35B32

26/44

DocID18391 Rev 4

Figure 14. Page Program (PP) instruction sequence

1. 1

≤ n ≤ 256.

2. Address bits A15 to A12 are Don’t Care.

6.9

ECC (error correction code) and write cycling

The M35B32 devices offer an ECC (error correction code) logic which compares each 4-

byte word with its associated 6 EEPROM bits of ECC. As a result, if a single bit out of

4 bytes of data happens to be erroneous during a read operation, the ECC detects it and

replaces it with the correct value. The read reliability is therefore much improved by the use

of this feature.

Note, however, that even if a single byte has to be written, 4 bytes are internally modified

(plus the ECC bits), that is, the addressed byte is cycled together with the other three bytes

making up the word. It is therefore recommended to write data by word (4 bytes) at address

4*N (where N is an integer) in order to benefit from the larger amount of Write cycles.

Those devices are qualified at 1 million (1 000 000) write cycles, using a cycling routine that

writes to the device by multiples of 4-byte packets.

AI01795D

3456789 10

20 21 22 23 24 25 26 27

14 13

3210

28 29 30

High Impedance

Instruction

16-Bit Address

765432

Data Byte

M35B32 Datasheet(PDF) 26 Page - STMicroelectronics