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STL3N10F7 Datasheet(PDF) 1 Page - STMicroelectronics |
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STL3N10F7 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 13 page ![]() This is information on a product in full production. April 2014 DocID025948 Rev 2 1/13 STL3N10F7 N-channel 100 V, 0.062 Ω typ., 4 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 2x2 package Datasheet - production data Figure 1. Internal schematic diagram Features • N-channel enhancement mode • Low gate charge • 100% avalanche rated Applications • Switching applications Description This device utilizes the 7 th generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest R DS(on) in all packages. PowerFLAT™ 2x2 1 2 3 6 5 4 1 2 3 1(D) 2(D) 3(G) 6(D) 5(D) 4(S) D S AM11269v1 Bottom view Order code VDS RDS(on) max ID STL3N10F7 100 V 0.07 Ω 4 A Table 1. Device summary Order code Marking Packages Packaging STL3N10F7 ST3N PowerFLAT™ 2x2 Tape and reel www.st.com |
Similar Part No. - STL3N10F7 |
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Similar Description - STL3N10F7 |
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