IDT71V67802 datasheet(9/22 Pages) IDT

9 / 22 page

6.42

IDT71V67602, IDT71V67802, 256K x 36, 512K x 18, 3.3V Synchronous

Commercial and Industrial Temperature Ranges

SRAMs with 2.5V I/O, Pipelined Outputs, Single Cycle Deselect

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

|ILI|

Input Leakage Current

VDD = Max., VIN = 0V to VDD

___

5µ A

|ILZZ|

ZZ and

LBO Input Leakage Current(1)

VDD = Max., VIN = 0V to VDD

___

µ A

|ILO|

Output Leakage Current

VOUT = 0V to VDDQ, Device Deselected

___

5µ A

VOL

Output Low Voltage

IOL = +6mA, VDD = Min.

___

0.4

VOH

Output High Voltage

IOH = -6mA, VDD = Min.

2.0

___

5311 tbl 08

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range(1)

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range (VDD = 3.3V ± 5%)

Figure 2. Lumped Capacitive Load, Typical Derating

Figure 1. AC Test Load

AC Test Load

AC Test Conditions

(VDDQ = 2.5V)

NOTE:

1. The

LBO pin will be internally pulled to VDD if it is not actively driven in the application and the ZZ pin will be internally pulled to VSS if not actively driven.

NOTES:

1. All values are maximum guaranteed values.

2. At f = fMAX, inputs are cycling at the maximum frequency of read cycles of 1/tCYC while

ADSC = LOW; f=0 means no input lines are changing.

3. For I/Os VHD = VDDQ - 0.2V, VLD = 0.2V. For other inputs VHD = VDD - 0.2V, VLD = 0.2V.

VDDQ/2

Ω

I/O

Z0 =50

Ω

5311 drw 06 ,

20 30 50

100

200

∆tCD

(Typical, ns)

Capacitance (pF)

5311 drw 07

Symbol

Parameter

Test Conditions

166MHz

150MHz

133MHz

Unit

Com'l Only

Com'l

Ind

Com'l

Ind

IDD

Operating Power Supply Current

Device Selected, Outputs Open, VDD = Max.,

VDDQ = Max., VIN > VIH or < VIL, f = fMAX

(2)

340

305

325

260

280

ISB1

CMOS Standby Power Supply

Current

Device Deselected, Outputs Open, VDD = Max.,

VDDQ = Max., VIN > VHD or < VLD, f = 0

(2,3)

ISB2

Clock Running Power

Supply Current

Device Deselected, Outputs Open, VDD = Max.,

VDDQ = Max., VIN > VHD or < VLD, f = fMAX

(2,3)

160

155

175

150

170

IZZ

Full Sleep Mode Supply Current

ZZ > VHD, VDD = Max.

5311 tbl 09

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Timing Reference Levels

AC Test Load

0 to 2.5V

2ns

VDDQ/2

See Figure 1

5311 tbl 10

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