IQS360 datasheet(21/53 Pages) ETC2

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IQ Switch

ProxSense

® Series

IQS360 Datasheet

Page 21 of 53

Revision 1.10

October 2015

Start

Control Byte

ACK

Data n

Random Read

Stop

NACK

Adr + READ

Start

Control Byte

ACK

Address-

command

ACK

Adr + WRITE

7.4 Random Read.I

2C Write

To write settings to the device a Data Write is performed. Here the Address-Command is

always required, followed by the relevant data bytes to write to the device.

DATA WRITE

Start

Adr + WRITE

Control Byte

ACK

Address-

Command

ACK

Data n

ACK

Stop

ACK

Data n+1

Figure 7.3

2C Write.

7.5 End of

Communication

Session / Window

Similar to other Azoteq I

2C devices, to end

the I

2C communication session, a STOP

command

given.

When

sending

numerous read and write commands in one

communication cycle, a repeated start

command must be used to stack them

together (since a STOP will jump out of the

communication

window,

which

not

desired).

The

STOP

will

then

end

the

communication, and the IQS360 will return

to process a new set of data. Once this is

obtained, the communication window will

again become available (RDY set LOW).

7.6 Event Mode

The IQS360 device can operate in an

event-driven I

2C communication mode (also

called “Event Mode”), with the RDY pin

ONLY indicating a communication window

after a prescribed event has occurred

(except for the Setup Window after POR).

These events include:



Proximity events



Touch events



ATI events



Tracking events



Snap events



Block events

Event Mode can be enabled by setting the

Event Mode bit in Register 0x08, Settings

byte 2.

Note: The device is

also capable of

functioning without a RDY line on a polling

basis.

7.7 RDY Hand-Shake Routine

The master or host MCU has the capability

to force a communication window at any

time, by pulling the RDY line low. The

communication window will open directly

following the current conversion.

7.8 I

2C Specific Commands

7.8.1 Show Reset

The SHOW_RESET bit can be read in

0x01,

byte

determine

whether a reset has occurred on the

device. This bit will be set

’1’ after a reset.

The SHOW_RESET bit will be cleared (set

’0’) by writing a ’1’ into the ACK_RESET

bit in Register 0x08, Settings byte 1. A

reset will typically take place of a timeout

during communication occurs.

7.8.2 WDT disable

The WDT (watchdog timer) is used to reset

the IC if a problem (for example a voltage

spike) occurs during communication. The

WDT will time-out (and thus reset the

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