SP6122ACUSLASHTR datasheet(12/19 Pages) SIPEX

12 / 19 page

Rev. 7/16/03

SP6122 Low Voltage, Micro 8, PFET, Buck Controller

The copper loss in the inductor can be

calculated from the equation:

PL(Cu) = IL(RMS)2 RWINDING≅IOUT(max)2 RWINDING

For the 2.2µH example with 0.012Ω ESR in

the winding, 4A load and 1.9V output, the

copper loss in the inductor is 190mW.

OUTPUT CAPACITOR SELECTION

The output capacitor is typically selected

based on its ability to maintain the output

within specified tolerance limits during load

transients. During an output load transient,

the output capacitor must supply all the

additional current demanded by the load

until the SP6122 adjusts the inductor cur-

rent to the new value. Therefore the capaci-

tance must be large enough so that the

output voltage is held up while the inductor

current ramps up or down to the value

corresponding to the new load current. For

power converters delivering greater than

1A at less than 1MHz switching frequency,

the output capacitor is typically greater than

100µF. Typically, tantalum and OSCON

capacitors are used to get high output ca-

pacitance in a small space. These capaci-

tors have a high Equivalent Series Resis-

tance (ESR) when compared to ceramic

capacitors and this ESR is both a curse and

a blessing. Unfortunately, the ESR (Equiva-

lent Series Resistance) in the output ca-

pacitor causes a step in the output voltage

equal to the ESR value multiplied by the

change in load current. As a result, in a

power supply using a tantalum, aluminum

electrolytics or OSCON output capacitor,

the value of output capacitance (or number

of output capacitors) is typically chosen to

minimize the output variation due to the

load step imposed on this ESR. However,

the SP6122 takes advantage of the natural

presence of this ESR to control the loop.

Because the inductor ripple current also

flows through this ESR, and output ripple

voltage is created and the waveform is

resembles a miniature current-mode timing

waveform. For a 1.9V output voltage, the

required ripple is a reasonable 38 mV. The

designer must chose all other trade-offs

wisely to maintain this ripple

0.02 * VOUT < IPP * RESR

and

∆ILOAD * RESR < ∆VTOL

where:

VOUT = DC output voltage

RESR = ESR of the output capacitor

DILOAD = change in current due to load

step

DVTOL = tolerable deviation due to load

transient

IPP = peak to peak inductor ripple current

Output ripple is due primarily to the output

ripple current and the output capacitor ESR

value as seen in the following equation:

∆VOUT ≅ IPP RESR

For our SP6122 evaluation board example

with ESR = 35mΩ and IPP = 1.32A, ∆VOUT =

46mV. Note that a 4A step creates a 140mV

deviation. If this is unacceptable, ESR and

IPP must be reconsidered in order to im-

prove step response and maintain output

ripple.

Recommended capacitors that can be used

effectively in SP6122 applications are: low-

ESR aluminum electrolytic capacitors,

OSCON capacitors that provide a very high

performance/size ratio for electrolytic ca-

pacitors and low-ESR tantalum capacitors.

AVX TPS series and Kemet T510 surface

mount capacitors are popular tantalum ca-

pacitors that work well in SP6122 applica-

tions. POSCAP from Sanyo is a solid elec-

trolytic chip capacitor that has low ESR and

high capacitance. For the same ESR value,

POSCAP has lower profile compared with a

tantalum capacitor.

APPLICATION INFORMATION: Continued

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