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SP6650 Datasheet(PDF) 7 Page - Sipex Corporation |
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SP6650 Datasheet(HTML) 7 Page - Sipex Corporation |
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7 / 17 page ![]() 7 Date: 5/25/04 SP6650 High Efficiency 600mA Synchronous Buck Regulator © Copyright 2004 Sipex Corporation Under-Current Detection The synchronous rectifier is comprised of the inductor discharge switch, a voltage compara- tor, and a latch. During the off-time, positive inductor current flows into the PGND pin 9 through the low side NMOS switch to LX pin 10, through the inductor and the output capaci- tor, and back to pin 9. The comparator monitors the voltage drop across the discharge NMOS. As the inductor current approaches zero, the channel voltage sign goes from negative to positive, causing the comparator to trigger the latch and open the switch to prevent inductor current reversal. This circuit along with the on- time one shot puts the converter into PFM mode and improves light load efficiency when the load current is less than half the inductor ripple current defined by KON/L. Thermal Shutdown The converter will open both power switches if the die junction temperature rises above 140 °C. The die must cool down below 126 °C before the regulator is re-enabled. This feature protects the SP6650 and surrounding circuitry from exces- sive power dissipation due to fault conditions. Shutdown/Enable Control Pin 5 of the device is a logic level control pin that shuts down the converter with a logic low, or enables the converter with a logic high. When the converter is shut down, the power switches are opened and all circuit biasing is extinguished leaving only junction leakage currents on sup- ply pins 1 and 2. After pin 5 is brought high to enable the converter, there is a turn on delay to allow the regulator circuitry to re-establish it- self. Power conversion begins with the assertion of the internal reference ready signal which occurs approximately 150 µs after the enable signal is received. Battery Low Indicator The regulator bias voltage on pin 2 (VIN) is divided down and compared to the internal +1.25V reference voltage. When pin 2 voltage drops below +3.00V, an open drain NMOS on pin 3 (BLON) sinks current to ground. Tying a resistor from pin 3 to VIN or VOUT creates a logic level battery low indicator. A low bandwidth comparator and 2.9% hysteresis filter the input voltage ripple to prevent noisy transitions at the threshold. External Feedback Pin The SP6650 comes with a factory preset output voltage of +3.3V when pin 6 (FB) is grounded. Otherwise, the output voltage can be externally programmed within the range +1.25V to +5.0V by tying a resistor from FB to ground and FB to VOUT (pin7). See the applications section for resistor selection information. |
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