Functional Descriptions

21544-DSH-001-E

Mindspeed Technologies

®

21

Mindspeed Proprietary and Confidential

4.1

High-Speed Input

Digital video coaxial cables are AC-coupled to the high-speed low-noise inputs (SDIP/SDIN). These are designed

to operate in both single-ended or differential mode. The typical application is single-ended into the non-inverting

SDI input with the inverting SDI input biased to match the bias on the input used.

The M21544/54/64 do not contain any internal input terminations and require both external input termination as

well as the matching circuit to exceed the SMPTE input return loss specifications. The package and IC design have

been optimized for high-speed performance, allowing them to exceed the SD/HD/3G SMPTE return loss.

For non-inverting single-ended operation, the recommended input circuit is shown in Figure 4-1. For differential

operation, the matching/termination circuit on SDIP should be duplicated on SDIN.

4.1.1

Input Signal Detection

The high-speed input block offers a signal detect function that can be monitored either with pin.MF3 or

register.GenConfig bit[7]. The signal detect is also used to turn off the device if there is no signal present at the

input. If desired, this function can be bypassed using register.GenConfig bit[4:3] or by setting pin.MF1 = low in

hardware mode.

Figure 4-2.

M21564 Block Diagram

SDO0[P/N]

Jitter

Cleaner

Digital Interface

(Hardware or 4-wire mode acess)

MODE_SEL

SDO1_DISABLE

SDIP

Input Buffer

Adaptive Equalization , 6dB

attenuation and signal detection

Adaptive

EQ

Output Buffer0

Programmable Output Swing , Vcm

and De -emphasis

DRV

MF0

MF1

MUTE

MUTERef

xCS

MF2

MF3

5.6nH

1uF

37.5Ω

SDIN

1uF

75Ω

75Ω

BNC

M21564