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PI6CFGL402B Datasheet(PDF) 6 Page - Pericom Semiconductor Corporation |
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PI6CFGL402B Datasheet(HTML) 6 Page - Pericom Semiconductor Corporation |
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6 / 8 page ![]() 6 PI6CFGL402B Low Power PCIe 3.0 Clock Generator with 4 HCSL Outputs All trademarks are property of their respective owners. www.pericom.com 03/03/15 Electrical Characteristics–Phase Jitter Parameters (TA = -40~85oC; Supply Voltage VDD = 3.3V +/-10%; VDDO = 1.8V +/-10%; 100MHz output frequency, See Test Loads for Loading Conditions) Symbol Parameters Condition Min. Type Industry Limit Units tjphPCIeG1 Phase Jitter, PCI Express PCIe Gen 11,2,3,5 25 86 ps (p-p) tjphPCIeG2 PCIe Gen 2 Low Band 10kHz < f < 1.5MHz1,2,5 0.9 3 ps (rms) PCIe Gen 2 High Band 1.5MHz < f < Nyquist (50MHz)1,2,5 1.6 3.1 ps (rms) tjphPCIeG3 PCIe Gen 3 (PLL BW of 2-4MHz, CDR = 10MHz)1,2,4,5 0.36 1 ps (rms) Notes: 1.Guaranteedbydesignandcharacterization,not100%testedinproduction. 2.Seehttp://www.pcisig.comforcompletespecs. 3.Samplesizeofatleast100kcycles.Thisfiguresextrapolatesto108pspk-pk@1McyclesforaBERof1-12. 4.CalculatedfromIntel-suppliedClockJitterTool. 5.Appliestoalldifferentoutputs. 15-0032 |
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