ADuM3150ARSZ datasheet(16/21 Pages) AD

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ADuM3150

Data Sheet

APPLICATIONS INFORMATION

INTRODUCTION

The ADuM3150 is part of a family of devices created to optimize

isolation of SPI for speed and provide additional low speed

channels for control and status monitoring functions. The

isolators are based on differential signaling iCoupler technology

for enhanced speed and noise immunity.

High Speed Channels

The ADuM3150 has four high speed channels. The first three,

CLK, MI/SO, and MO/SI (the slash indicates the connection of

the particular input and output, forming a datapath across the

isolator that corresponds to an SPI bus signal), are optimized

for either low propagation delay in the B grade, or high noise

immunity in the A grade. The difference between the grades is

the addition of a glitch filter to these three channels in the A

grade version, which increases propagation delay. The B grade

version, with a maximum propagation delay of 14 ns, supports a

maximum clock rate of 17 MHz in a standard 4-wire SPI.

However, because the glitch filter is not present in the B grade

version, ensure that spurious glitches of less than 10 ns are not

present.

Glitches of less than 10 ns in the B grade devices can cause the

second edge of the glitch to be missed. This pulse condition is

seen as a spurious data transition on the output that is corrected

by a refresh or the next valid data edge. It is recommended to

use A grade devices in noisy environments.

The relationship between the SPI signal paths and the pin

mnemonics of the ADuM3150 and data directions is

summarized in Table 19.

Table 19. Pin Mnemonic Correspondence to SPI Signal Path

Names

SPI Signal Path

Master

Side 1

Data

Direction

Slave

Side 2

CLK

MCLK

→

SCLK

MO/SI

→

MI/SO

←

MSS

→

SSS

The datapaths are SPI mode agnostic. The CLK and MO/SI SPI

datapaths are optimized for propagation delay and channel-to-

channel matching. The MI/SO SPI datapath is optimized for

propagation delay. The device does not synchronize to the clock

channel, so there are no constraints on the clock polarity or the

timing with respect to the data lines. To allow compatibility

with nonstandard SPI interfaces, the MI pin is always active,

and does not tristate when the slave select is not asserted. This

precludes tying several MI lines together without adding a

tristate buffer or multiplexor.

The SS (slave select bar) is typically an active low signal. It can

have many different functions in SPI and SPI like busses. Many

of these functions are edge triggered; therefore, the SS path

contains a glitch filter in both the A grade and the B grade. The

glitch filter prevents short pulses from propagating to the output

or causing other errors in operation. The MSS signal requires a

10 ns setup time in the B grade prior to the first active clock

edge to allow for the added propagation time of the glitch filter.

Low Speed Data Channels

The low speed data channels are provided as economical

isolated datapaths where timing is not critical. The dc value of

all high and low speed inputs on a given side of the device is

sampled simultaneously, packetized, and shifted across an

isolation coil. The high speed channels are compared for dc

accuracy, and the low speed data is transferred to the appropriate

low speed outputs. The process is then reversed by reading the

inputs on the opposite side of the device, packetizing them, and

sending them back for similar processing. The dc correctness

data for the high speed channels is handled internally, and the

low speed data is clocked to the outputs simultaneously.

This bidirectional data shuttling is regulated by a free running

internal clock. Because data is sampled at discrete times based

on this clock, the propagation delay for a low speed channel is

between 400 ns and 1.7 µs depending on where the input data

edge changes with respect to the internal sample clock.

Figure 10 illustrates the behavior of the low speed channels.

•

Point A: The data may change as much as 2.5 µs before it is

sampled, then it takes about 100 ns to propagate to the

output. This appears as 2.5 μs of uncertainty in the

propagation delay time.

•

Point B: Data pulses that are less than the minimum low

speed pulse width may not be transmitted at all because

they may not be sampled.

INPUT A

OUTPUT A

SAMPLE CLOCK

OUTPUT CLOCK

Figure 10. Low Speed Channel Timing

Rev. A | Page 16 of 21

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