Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

PIC16F876ATI/ML Datasheet(PDF) 100 Page - Microchip Technology

Part # PIC16F876ATI/ML
Description  28/40-pin Enhanced FLASH Microcontrollers
PDF  234 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F876ATI/ML Datasheet(HTML) 100 Page - Microchip Technology

Back Button PIC16F876ATI/ML Datasheet HTML 96Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 97Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 98Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 99Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 100Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 101Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 102Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 103Page - Microchip Technology PIC16F876ATI/ML Datasheet HTML 104Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 100 / 234 page
background image
PIC16F87XA
DS39582B-page 98
 2003 Microchip Technology Inc.
9.4.7.1
Clock Arbitration
Clock arbitration occurs when the master, during any
receive, transmit or Repeated Start/Stop condition,
deasserts the SCL pin (SCL allowed to float high).
When the SCL pin is allowed to float high, the Baud
Rate Generator (BRG) is suspended from counting
until the SCL pin is actually sampled high. When the
SCL pin is sampled high, the Baud Rate Generator is
reloaded with the contents of SSPADD<6:0> and
begins counting. This ensures that the SCL high time
will always be at least one BRG rollover count, in the
event that the clock is held low by an external device
(Figure 9-17).
FIGURE 9-18:
BAUD RATE GENERATOR TIMING WITH CLOCK ARBITRATION
SDA
SCL
SCL deasserted but slave holds
DX-1
DX
BRG
SCL is sampled high, reload takes
place and BRG starts its count
03h
02h
01h
00h (hold off)
03h
02h
Reload
BRG
Value
SCL low (clock arbitration)
SCL allowed to transition high
BRG decrements on
Q2 and Q4 cycles



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com