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HM62256BLTM-7SL Datasheet(PDF) 7 Page - Hitachi Semiconductor |
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HM62256BLTM-7SL Datasheet(HTML) 7 Page - Hitachi Semiconductor |
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7 / 20 page  HM62256B Series 7 AC Characteristics (Ta = 0 to +70 °C, V CC = 5.0 V ± 10%) Test Conditions • Input pulse levels: 0.8 V to 2.4 V • Input rise and fall time: 5 ns • Input and output timing reference levels: 1.5 V • Output load: 1 TTL Gate + C L (50 pF) (HM62256B-5) 1 TTL Gate + C L (100 pF) (HM62256B-7/8) (Including scope & jig) Read Cycle HM62256B -5 -7 -8 Parameter Symbol Min Max Min Max Min Max Unit Notes Read cycle time t RC 55 — 70 — 85 — ns Address access time t AA — 55 — 70 — 85 ns Chip select to access time t ACS — 55 — 70 — 85 ns Output enable to output valid t OE — 35 — 40 — 45 ns Chip select to output in low-Z t CLZ 5 — 10 — 10 — ns 2 Output enable to output in low-Z t OLZ 5— 5— 5 — ns 2 Chip deselect to output in high-Z t CHZ 0 20 0 25 0 30 ns 1, 2 Output disable to output in high-Z t OHZ 0 20 0 25 0 30 ns 1, 2 Output hold from address change t OH 5— 5— 5 — ns |
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