ICS950805 datasheet(1/20 Pages) ICST

Part #	ICS950805

Description	Frequency Generator with 200MHz Differential CPU Clocks

PDF	20 Pages

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Manufacturer	ICST [Integrated Circuit Systems]

Direct Link	http://www.icst.com

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1 / 20 page

Integrated

Circuit

Systems, Inc.

ICS950805

0649H—02/25/05

Block Diagram

Recommended Application:

CK-408 clock for Almador-M and Brookdale-Mobile

chipsets. Programmable for group to group skew.

Output Features:

•

3 Differential CPU Clock Pairs (differential current

mode)

•

7 PCI (3.3V) @ 33.3MHz

•

3 PCI_F (3.3V) @ 33.3MHz

•

1 USB (3.3V) @ 48MHz

•

1 DOT (3.3V) @ 48MHz

•

1 REF (3.3V) @ 14.318MHz

•

1 3V66 (3.3V) @ 66.6MHz

•

1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz

•

3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN

or 66.6MHz

•

1 66MHz_IN/3V66 (3.3V) @ Input/66MHz

Features:

•

Almador Chipset has a DLL driving the clock buffer

path for the 3 buffer path 66.6 MHz outputs,

66Buf(0:2). Almador board level designs MUST

use pin 22, 66Buf_1, as the feedback connection

from the clock buffer path to the Almador

(GMCH) chipset.

•

Supports spread spectrum modulation,

down spread 0 to -0.5%.

•

Efficient power management scheme through PD#,

CPU_STOP# and PCI_STOP#.

Key Specifications:

•

CPU Output Jitter <150ps

•

3V66 Output Jitter <250ps

•

66MHz Output Jitter (Buffered Mode Only) <100ps

•

CPU Output Skew <100ps

Pin Configuration

56-Pin 300mil SSOP

6.10 mm. Body, 0.50 mm. pitch TSSOP

Frequency Generator with 200MHz Differential CPU Clocks

VDDREF

X1

X2

GND

PCICLK_F0

PCICLK_F1

PCICLK_F2

VDDPCI

GND

PCICLK0

PCICLK1

PCICLK2

PCICLK3

VDDPCI

GND

PCICLK4

PCICLK5

PCICLK6

VDD3V66

GND

66MHz_OUT0/3V66_2

66MHz_OUT1/3V66_3

66MHz_OUT2/3V66_4

66MHz_IN/3V66_5

*PD#

VDDA

GND

Vtt_PWRGD#

REF

FS1

FS0

CPU_STOP#*

CPUCLKT0

CPUCLKC0

VDDCPU

CPUCLKT1

CPUCLKC1

GND

VDDCPU

CPUCLKT2

CPUCLKC2

MULTSEL0*

I REF

GND

FS2

48MHz_USB

48MHz_DOT

VDD48

GND

3V66_1/VCH_CLK

PCI_STOP#*

3V66_0

VDD3V66

GND

SCLK

SDATA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

Functionality

PLL2

PLL1

Spread

Spectrum

3V66_5/66MHz_IN

3V66_3/66MHz_OUT1

3V66_(4,2)/66MHz_OUT(2,0)

48MHz_USB

48MHz_DOT

X1

X2

XTAL

OSC

3V66

DIVDER

PD#

CPU_STOP#

PCI_STOP#

MULTSEL0

SDATA

SCLK

FS (2:0)

I REF

Control

Logic

Config.

Reg.

REF

66MHz_0

CPU

DIVDER

3

CPUCLKT (2:0)

CPUCLKC (2:0)

Stop

3V66_1/VCH_CLK

PCICLK (6:0)

PCI

DIVDER

3

7

PCICLK_F (2:0)

Stop

* These inputs have 150K internal pull-up resistor to VDD.

2

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S

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S

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