COP8SA datasheet(43/60 Pages) NSC

43 / 60 page

13.0 Instruction Set (Continued)

13.4.9 No-Operation Instruction

The no-operation instruction does nothing, except to occupy

space in the program memory and time in execution.

No-Operation (NOP)

Note: The VIS is a special case of the Indirect Transfer of Control addressing

mode, where the double byte vector associated with the interrupt is

transferred from adjacent addresses in the program memory into the

program counter (PC) in order to jump to the associated interrupt ser-

vice routine.

13.5 REGISTER AND SYMBOL DEFINITION

The following abbreviations represent the nomenclature

used

the

instruction

description

and

the

COP8

cross-assembler.

Registers

8-Bit Accumulator Register

8-Bit Address Register

8-Bit Stack Pointer Register

15-Bit Program Counter Register

Upper 7 Bits of PC

Lower 8 Bits of PC

1 Bit of PSW Register for Carry

1 Bit of PSW Register for Half Carry

GIE

1 Bit of PSW Register for Global Interrupt

Enable

Interrupt Vector Upper Byte

Interrupt Vector Lower Byte

Symbols

[B]

Memory Indirectly Addressed by B Register

[X]

Memory Indirectly Addressed by X Register

Direct Addressed Memory

Mem

Direct Addressed Memory or [B]

Meml

Direct Addressed Memory or [B] or

Immediate Data

Imm

8-Bit Immediate Data

Reg

(Includes B, X and SP)

Bit

Bit Number (0 to 7)

←

Loaded with

↔

Exchanged with

COP8SA Datasheet(PDF) 43 Page - National Semiconductor (TI)

COP8SA Datasheet(HTML) 43 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Datasheet Download

Link URL