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ADC12DL066CIVS/NOPB Datasheet(PDF) 21 Page - Texas Instruments

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Part # ADC12DL066CIVS/NOPB
Description  450 MHz Input Bandwidth A/D Converter
PDF  33 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DL066CIVS/NOPB Datasheet(HTML) 21 Page - Texas Instruments

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ADC12DL066
www.ti.com
SNAS188G – FEBRUARY 2004 – REVISED FEBRUARY 2013
For single frequency sine waves with angular errors of less than 45° (
π/4) between the two inputs, the full scale
error in LSB can be described as approximately
EFS = 2
(n-1) * ( 1 - cos (dev) ) = 2048 * ( 1 - cos (dev) )
where
•
dev is the angular difference in degrees between the two signals having a 180° relative phase relationship to
each other (see Figure 32). Drive the analog inputs with a source impedance less than 100
Ω.
(8)
Figure 32. Angular Errors Between the Two Input Signals Will Reduce the Output Level or Cause
Distortion
Single-Ended Operation
Single-ended performance is inferior to performance obtained when differential input signals are used. For this
reason, single-ended operation is not recommended. However, if single ended-operation is required and the
resulting performance degradation is acceptable, one of the analog inputs should be connected to the d.c. mid
point voltage of the driven input. The peak-to-peak differential input signal at the driven input pin should be twice
the reference voltage to maximize SNR and SINAD performance (Figure 31b). For example, set VREF to 0.5V,
bias VIN− to 1.0V and drive VIN+ with a signal range of 0.5V to 1.5V.
Because very large input signal swings can degrade distortion performance, better performance with a single-
ended input can be obtained by reducing the reference voltage when maintaining a full-range output. Table 1 and
Table 2 indicate the input to output relationship of the ADC12DL066. Note again that single-ended operation of
the ADC12D040 is not recommended because of the degraded performance that results. A single-ended to
differential conversion circuit is shown in Figure 34.
Table 1. Input to Output Relationship – Differential Input
VIN+
VIN−
Binary Output
2’s Complement Output
VCM − VREF / 2
VCM + VREF / 2
0000 0000 0000
1000 0000 0000
VCM − VREF / 4
VCM + VREF / 4
0100 0000 0000
1100 0000 0000
VCM
VCM
1000 0000 0000
0000 0000 0000
VCM + VREF / 4
VCM − VREF / 4
1100 0000 0000
0100 0000 0000
VCM + VREF / 2
VCM − VREF / 2
1111 1111 1111
0111 1111 1111
Table 2. Input to Output Relationship – Single-Ended Input
VIN+
VIN−
Binary Output
2’s Complement Output
VCM − VREF
VCM
0000 0000 0000
1000 0000 0000
VCM − VREF / 2
VCM
0100 0000 0000
1100 0000 0000
VCM
VCM
1000 0000 0000
0000 0000 0000
VCM + VREF / 2
VCM
1100 0000 0000
0100 0000 0000
VCM + VREF
VCM
1111 1111 1111
0111 1111 1111
Driving the Analog Inputs
The VIN+ and the VIN− inputs of the ADC12DL066 consist of an analog switch followed by a switched-capacitor
amplifier. The capacitance seen at the analog input pins changes with the clock level, appearing as 8 pF when
the clock is low, and 7 pF when the clock is high.
Copyright © 2004–2013, Texas Instruments Incorporated
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