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74LVC1G80 Datasheet(PDF) 11 Page - Panasonic Semiconductor |
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74LVC1G80 Datasheet(HTML) 11 Page - Panasonic Semiconductor |
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11 / 18 page ![]() 2004 Sep 10 11 Philips Semiconductors Product specification Single D-type flip-flop; positive-edge trigger 74LVC1G80 AC WAVEFORMS handbook, full pagewidth MNA652 CP input Q output tPHL tPLH VM VM VOH VI GND D input VI GND VOL VM VM Fig.6 Clock (CP) to output (Q) propagation delay times. VCC VM INPUT VI tr =tf 1.65 V to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 V to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 V to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 V to 5.5 V 0.5 × VCC VCC ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. |
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