1-416

8

7

6

1

3

SHIELD

5

2

4

VDD1

VI

*

GND1

VDD2

VO

GND2

VI, INPUT

VI, OUTPUT

H

L

H

L

TRUTH TABLE

H

40 ns Prop. Delay,

SO-8 Optocoupler

Preliminary Technical Data

Features

• +5 V CMOS Compatibility

• 8 ns Pulse Width Distortion

• High Speed: 12 Mbd

• 10 kV/

Mode Rejection

• Industrial Temperature

Range: 0

• Safety and Regulatory

Approvals

UL Recognized 2500 V rms for

1 min. per UL 1577

CSA Component Acceptance

Notice #5

Applications

• Digital Fieldbus Isolation:

DeviceNet, SDS, PROFIBUS

• Multiplexed Data

Transmission

• Computer Peripheral

Interface

• Microprocessor System

Interface

Description

Available in the SO-8 package

style, the HCPL-0710 optocoupler

utilizes the latest CMOS IC

technology to achieve outstanding

performance with very low power

consumption. The HCPL-0710

requires only two bypass

capacitors for complete CMOS

compatibility.

Basic building blocks of the

HCPL-0710 are a CMOS LED

driver IC and a CMOS detector

IC. A CMOS logic input signal

controls the LED driver IC which

supplies current to the LED.

The detector IC incorporates an

integrated photodiode, a high-

speed transimpedance amplifier,

and a voltage comparator with an

output driver.

HCPL-0710

Functional Diagram

*Pin 3 is the anode of the internal LED and must be left unconnected for guaranteed data sheet performance.

Pin 7 is not connected internally. External connections to pin 7 are not recommended.

**A 0.1

µF bypass capacitor must be connected between pins 1 and 4, and 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component

to prevent damage and/or degradation which may be induced by ESD.

This data sheet represents the latest information at the time of publication of this catalog. All specifications

subject to change. Samples available Fall 1996.