LMC6032IMSLASHNOPB datasheet(2/25 Pages) TI1

2 / 25 page

LMC6032

SNOS609C – NOVEMBER 1994 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

Differential Input Voltage

±Supply Voltage

Supply Voltage (V+

− V−)

16V

Output Short Circuit to V+

See(2)

Output Short Circuit to V−

See(3)

Lead Temperature (Soldering, 10 sec.)

260°C

Storage Temperature Range

−65°C to +150°C

Junction Temperature

150°C

ESD Tolerance(4)

1000V

Power Dissipation

See(5)

(V+) + 0.3V

Voltage at Output/Input Pin

(V−)

− 0.3V

Current at Output Pin

±18 mA

Current at Input Pin

±5 mA

Current at Power Supply Pin

35 mA

(1)

Absolute Maximum Ratings indicate limits beyond which damage to component may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test

conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.

(2)

Do not connect output to V+, when V+ is greater than 13V or reliability may be adversely affected.

(3)

Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or

multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30

mA over long term may adversely affect reliability.

(4)

Human body model, 100 pF discharged through a 1.5 k

Ω resistor.

(5)

The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient

temperature is PD = (TJ(max) – TA)/θJA.

Operating Ratings

(1)

Temperature Range

−40°C ≤ TJ ≤ +85°C

Supply Voltage Range

4.75V to 15.5V

Power Dissipation

(2)

8-Pin PDIP

101°C/W

Thermal Resistance (

θJA)

(3)

8-Pin SOIC

165°C/W

(1)

Absolute Maximum Ratings indicate limits beyond which damage to component may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test

conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.

(2)

For operating at elevated temperatures the device must be derated based on the thermal resistance

θJA with PD = (TJ − TA)/θJA.

(3)

All numbers apply for packages soldered directly into a PC board.

Submit Documentation Feedback

Product Folder Links: LMC6032

LMC6032IM/NOPB Datasheet(PDF) 2 Page - Texas Instruments

LMC6032IM/NOPB Datasheet(HTML) 2 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL