P4C1024

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Document # SRAM124 REV A

AC ELECTRICAL CHARACTERISTICS—READ CYCLE

(V

(2)

Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max

Read Cycle

Time

15

20

25

35

45

55

70

85

100

120

ns

Address

Access Time

15

20

25

35

45

55

70

85

100

120 ns

Chip Enable

Access Time

15

20

25

35

45

55

70

85

100

120 ns

Output Hold

from Address

Change

333333333

3

ns

Chip Enable to

Output in Low Z

333333333

3

ns

Chip Disable

to Output in

High Z

8

9

11

15

20

25

30

35

40

50

ns

Output Enable

Low to Data

Valid

7

9

11

15

20

25

30

35

40

50

ns

Output Enable

Low to Low Z

000000000

0

ns

Output Enable

High to High Z

7

9

11

15

20

25

30

35

40

50

ns

Chip Enable to

Power Up

Time

000000000

0

ns

Chip Disable

to Power Down

Time

12

20

20

20

25

30

35

40

45

50

ns

Symbol

Parameter

-15

-20

-25

-35

-45

Unit

-55

-70

-85

-100

-120

Notes:

5. WE is HIGH for READ cycle.

6. CE

7. ADDRESS must be valid prior to, or coincident with CE

LOW and CE

8. Transition is measured ± 200 mV from steady state voltage prior to

change, with loading as specified in Figure 1. This parameter is

sampled and not 100% tested.

TIMING WAVEFORM OF READ CYCLE NO. 1 (OE

OE

OE

OE