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PI4MSD5V9540BUE Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation |
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PI4MSD5V9540BUE Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation |
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1 / 12 page ![]() ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2 Channel I2C bus Multiplexer 2015-07-0032 PT0522-4 08/18/15 1 PI4MSD5V9540B Features 1-of-2 bidirectional translating multiplexer I2C-bus interface logic Operating power supply voltage:1.65 V to 5.5 V Allows voltage level translation between 1.2V, 1.8V,2.5 V, 3.3 V and 5 V buses Low standby current Low Ron switches Channel selection via I2C bus Power-up with all multiplexer channels deselected Capacitance isolation when channel disabled No glitch on power-up Supports hot insertion 5 V tolerant inputs 0 Hz to 400 kHz clock frequency ESD protection exceeds 8000 V HBM per JESD22- A114, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Packages offered: SOIC-8W,MSOP- 8U,TDFN2x3-8ZE Pin Configuration Description The PI4MSD5V9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C bus The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels. Only one SCx/SDx channel is selected at a time, determined by the contents of the programmable control register. A power-on reset function puts the registers in their default state and initializes the I2C bus state machine with no channels selected. The pass gates of the multiplexer are constructed such that the VCC pin can be used to limit the maximum high voltage that is passed by the PI4MSD5V9540B. This allows the use of different bus voltages on each SCx/SDx pair, so that1.2V, 1.8 V, 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors can pull the bus up to the desired voltage level for this channel. All I/O pins are 5 V tolerant. Pin Description Pin No Pin Name Type Description 1 SCL I/O serial clock line 2 SDA I/O serial data line 3 VCC Power supply voltage 4 SD0 I/O serial data 0 5 SC0 I/O serial clock 0 6 GND GND supply ground 7 SD1 I/O serial data 1 8 SC1 I/O serial clock 1 MSOP SOIC TDFN |
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