34AA04T-ESLASHST datasheet(5/36 Pages) MICROCHIP

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 2014 Microchip Technology Inc.

DS20005271B-page 5

34AA04

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

2.1

A0, A1, A2 Chip Address Inputs

The levels on these inputs are compared with the

corresponding bits in the slave address. The chip is

selected if the compare is true.

Up to eight 34AA04 devices may be connected to the

same bus by using different Chip Select bit combina-

tions. These inputs must be connected to either VSS or

VCC.

The A0 pin also serves as the high-voltage input for

enabling the SWPn and CWP instructions.

2.2

Serial Address/Data Input/Output

(SDA)

This is a bidirectional pin used to transfer addresses

and data into and data out of the device. It is an open

drain terminal. Therefore, the SDA bus requires a pull-

up resistor to VCC (typical 10 k

 for 100 kHz, 2 k for

400kHz and 1MHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

2.3

Serial Clock (SCL)

This input is used to synchronize the data transfer to

and from the device.

Symbol

PDIP

SOIC

TSSOP

UDFN

TDFN

Description

A0/VHV

Chip Address Input, High-Voltage Input

Chip Address Input

VSS

Ground

SDA

Serial Address/Data I/O

SCL

Serial Clock

Not Connected

VCC

+1.7V to 3.6V Power Supply

Note:

Exposed pad on TDFN/UDFN can be connected to VSS or left floating.

Note:

The comparison between the A0, A1, and

A2 pins and the corresponding Chip

Select bits is disabled for software Write-

Protect and Bank Select commands.

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