THS1041

SLAS289C − OCTOBER 2001 − REVISED OCTOBER 2004

24

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PRINCIPLES OF OPERATION

operating configuration examples (continued)

Figure 37 shows a configuration using external ADC references for digitizing a differential input with span 0.8 V.

MODE is tied to ground to disable the internal reference buffer. The external ADC reference sources must set

the internal bandgap refence (A1), though other components in the system may use the VREF output if desired.

External ADC references are best suited to applications which require the tighter reference voltage tolerance

and temperature coefficient than the internal bandgap reference (A1) can provide, or where the references are

to be shared among several THS1041 ADCs for best matching of their ADC channels.

AIN+

AIN−

REFB

MODE

REFSENSE

AVDD

1.7 V

1.3 V

1.7 V

1.3 V

1.5 V

1.5 V

REFT

2 V

1 V

0.1

µF

10

µF

20 pF

20 pF

20

Ω

20

Ω

10

µF

10

µF

Figure 37. Operating Configuration: 0.8-V Differential Input and External ADC References

clamp operation

10-Bit

DAC

_

+

CLAMPIN

CLAMP

AIN+

RIN

CIN

V(Clamp)

Control Register (Bit CLINT)

S/H

VIN

SW1

CLAMPOUT

Figure 38. Schematic of Clamp Circuitry

The THS1041 provides a clamp function for restoring a dc reference level to the signal at AIN+ or AIN− which

has been lost through ac-coupling from the signal source to this pin.

Figure 38 and Figure 39 show an example of using the clamp to restore the black level of a composite video

input ac-coupled to AIN+. While the clamp pin is held high, the clamp amplifier forces the voltage at AIN+ to equal

the clamp reference voltage, setting the dc voltage at AIN+ for the video black level.

After power up, the clamp reference voltage is the voltage on the CLAMPIN pin. This reference can instead be

taken from the internal CLAMP DAC by suitably programming the THS1041 clamp and control registers.

Clamp acquisition and clamp droop design calculations are discussed later.